forked from Minki/linux
aefa5688c0
upatepp can get called for a nohpte fault when we find from the linux page table that the translation was hashed before. In that case we are sure that there is no existing translation, hence we could avoid doing tlbie. We could possibly race with a parallel fault filling the TLB. But that should be ok because updatepp is only ever relaxing permissions. We also look at linux pte permission bits when filling hash pte permission bits. We also hold the linux pte busy bits while inserting/updating a hashpte entry, hence a paralle update of linux pte is not possible. On the other hand mprotect involves ptep_modify_prot_start which cause a hpte invalidate and not updatepp. Performance number: We use randbox_access_bench written by Anton. Kernel with THP disabled and smaller hash page table size. 86.60% random_access_b [kernel.kallsyms] [k] .native_hpte_updatepp 2.10% random_access_b random_access_bench [.] doit 1.99% random_access_b [kernel.kallsyms] [k] .do_raw_spin_lock 1.85% random_access_b [kernel.kallsyms] [k] .native_hpte_insert 1.26% random_access_b [kernel.kallsyms] [k] .native_flush_hash_range 1.18% random_access_b [kernel.kallsyms] [k] .__delay 0.69% random_access_b [kernel.kallsyms] [k] .native_hpte_remove 0.37% random_access_b [kernel.kallsyms] [k] .clear_user_page 0.34% random_access_b [kernel.kallsyms] [k] .__hash_page_64K 0.32% random_access_b [kernel.kallsyms] [k] fast_exception_return 0.30% random_access_b [kernel.kallsyms] [k] .hash_page_mm With Fix: 27.54% random_access_b random_access_bench [.] doit 22.90% random_access_b [kernel.kallsyms] [k] .native_hpte_insert 5.76% random_access_b [kernel.kallsyms] [k] .native_hpte_remove 5.20% random_access_b [kernel.kallsyms] [k] fast_exception_return 5.12% random_access_b [kernel.kallsyms] [k] .__hash_page_64K 4.80% random_access_b [kernel.kallsyms] [k] .hash_page_mm 3.31% random_access_b [kernel.kallsyms] [k] data_access_common 1.84% random_access_b [kernel.kallsyms] [k] .trace_hardirqs_on_caller Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
196 lines
5.3 KiB
C
196 lines
5.3 KiB
C
/*
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* Copyright IBM Corporation, 2013
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* Author Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2.1 of the GNU Lesser General Public License
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it would be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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*/
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/*
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* PPC64 THP Support for hash based MMUs
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*/
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#include <linux/mm.h>
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#include <asm/machdep.h>
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int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
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pmd_t *pmdp, unsigned long trap, unsigned long flags,
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int ssize, unsigned int psize)
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{
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unsigned int index, valid;
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unsigned char *hpte_slot_array;
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unsigned long rflags, pa, hidx;
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unsigned long old_pmd, new_pmd;
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int ret, lpsize = MMU_PAGE_16M;
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unsigned long vpn, hash, shift, slot;
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/*
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* atomically mark the linux large page PMD busy and dirty
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*/
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do {
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pmd_t pmd = ACCESS_ONCE(*pmdp);
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old_pmd = pmd_val(pmd);
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/* If PMD busy, retry the access */
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if (unlikely(old_pmd & _PAGE_BUSY))
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return 0;
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/* If PMD is trans splitting retry the access */
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if (unlikely(old_pmd & _PAGE_SPLITTING))
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return 0;
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/* If PMD permissions don't match, take page fault */
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if (unlikely(access & ~old_pmd))
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return 1;
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/*
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* Try to lock the PTE, add ACCESSED and DIRTY if it was
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* a write access
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*/
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new_pmd = old_pmd | _PAGE_BUSY | _PAGE_ACCESSED;
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if (access & _PAGE_RW)
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new_pmd |= _PAGE_DIRTY;
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} while (old_pmd != __cmpxchg_u64((unsigned long *)pmdp,
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old_pmd, new_pmd));
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/*
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* PP bits. _PAGE_USER is already PP bit 0x2, so we only
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* need to add in 0x1 if it's a read-only user page
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*/
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rflags = new_pmd & _PAGE_USER;
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if ((new_pmd & _PAGE_USER) && !((new_pmd & _PAGE_RW) &&
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(new_pmd & _PAGE_DIRTY)))
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rflags |= 0x1;
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/*
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* _PAGE_EXEC -> HW_NO_EXEC since it's inverted
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*/
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rflags |= ((new_pmd & _PAGE_EXEC) ? 0 : HPTE_R_N);
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#if 0
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if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
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/*
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* No CPU has hugepages but lacks no execute, so we
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* don't need to worry about that case
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*/
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rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
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}
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#endif
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/*
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* Find the slot index details for this ea, using base page size.
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*/
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shift = mmu_psize_defs[psize].shift;
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index = (ea & ~HPAGE_PMD_MASK) >> shift;
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BUG_ON(index >= 4096);
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vpn = hpt_vpn(ea, vsid, ssize);
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hash = hpt_hash(vpn, shift, ssize);
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hpte_slot_array = get_hpte_slot_array(pmdp);
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if (psize == MMU_PAGE_4K) {
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/*
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* invalidate the old hpte entry if we have that mapped via 64K
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* base page size. This is because demote_segment won't flush
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* hash page table entries.
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*/
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if ((old_pmd & _PAGE_HASHPTE) && !(old_pmd & _PAGE_COMBO))
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flush_hash_hugepage(vsid, ea, pmdp, MMU_PAGE_64K,
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ssize, flags);
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}
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valid = hpte_valid(hpte_slot_array, index);
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if (valid) {
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/* update the hpte bits */
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hidx = hpte_hash_index(hpte_slot_array, index);
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if (hidx & _PTEIDX_SECONDARY)
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hash = ~hash;
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slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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slot += hidx & _PTEIDX_GROUP_IX;
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ret = ppc_md.hpte_updatepp(slot, rflags, vpn,
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psize, lpsize, ssize, flags);
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/*
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* We failed to update, try to insert a new entry.
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*/
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if (ret == -1) {
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/*
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* large pte is marked busy, so we can be sure
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* nobody is looking at hpte_slot_array. hence we can
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* safely update this here.
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*/
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valid = 0;
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hpte_slot_array[index] = 0;
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}
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}
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if (!valid) {
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unsigned long hpte_group;
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/* insert new entry */
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pa = pmd_pfn(__pmd(old_pmd)) << PAGE_SHIFT;
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new_pmd |= _PAGE_HASHPTE;
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/* Add in WIMG bits */
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rflags |= (new_pmd & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
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_PAGE_GUARDED));
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/*
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* enable the memory coherence always
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*/
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rflags |= HPTE_R_M;
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repeat:
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hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL;
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/* Insert into the hash table, primary slot */
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slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0,
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psize, lpsize, ssize);
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/*
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* Primary is full, try the secondary
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*/
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if (unlikely(slot == -1)) {
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hpte_group = ((~hash & htab_hash_mask) *
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HPTES_PER_GROUP) & ~0x7UL;
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slot = ppc_md.hpte_insert(hpte_group, vpn, pa,
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rflags, HPTE_V_SECONDARY,
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psize, lpsize, ssize);
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if (slot == -1) {
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if (mftb() & 0x1)
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hpte_group = ((hash & htab_hash_mask) *
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HPTES_PER_GROUP) & ~0x7UL;
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ppc_md.hpte_remove(hpte_group);
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goto repeat;
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}
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}
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/*
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* Hypervisor failure. Restore old pmd and return -1
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* similar to __hash_page_*
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*/
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if (unlikely(slot == -2)) {
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*pmdp = __pmd(old_pmd);
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hash_failure_debug(ea, access, vsid, trap, ssize,
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psize, lpsize, old_pmd);
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return -1;
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}
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/*
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* large pte is marked busy, so we can be sure
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* nobody is looking at hpte_slot_array. hence we can
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* safely update this here.
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*/
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mark_hpte_slot_valid(hpte_slot_array, index, slot);
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}
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/*
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* Mark the pte with _PAGE_COMBO, if we are trying to hash it with
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* base page size 4k.
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*/
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if (psize == MMU_PAGE_4K)
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new_pmd |= _PAGE_COMBO;
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/*
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* The hpte valid is stored in the pgtable whose address is in the
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* second half of the PMD. Order this against clearing of the busy bit in
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* huge pmd.
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*/
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smp_wmb();
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*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
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return 0;
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}
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