forked from Minki/linux
b348aa6529
Modern IBM POWERPC systems support multiple (currently two) TCE tables per IOMMU group (a.k.a. PE). This adds a iommu_table_group container for TCE tables. Right now just one table is supported. This defines iommu_table_group struct which stores pointers to iommu_group and iommu_table(s). This replaces iommu_table with iommu_table_group where iommu_table was used to identify a group: - iommu_register_group(); - iommudata of generic iommu_group; This removes @data from iommu_table as it_table_group provides same access to pnv_ioda_pe. For IODA, instead of embedding iommu_table, the new iommu_table_group keeps pointers to those. The iommu_table structs are allocated dynamically. For P5IOC2, both iommu_table_group and iommu_table are embedded into PE struct. As there is no EEH and SRIOV support for P5IOC2, iommu_free_table() should not be called on iommu_table struct pointers so we can keep it embedded in pnv_phb::p5ioc2. For pSeries, this replaces multiple calls of kzalloc_node() with a new iommu_pseries_alloc_group() helper and stores the table group struct pointer into the pci_dn struct. For release, a iommu_table_free_group() helper is added. This moves iommu_table struct allocation from SR-IOV code to the generic DMA initialization code in pnv_pci_ioda_setup_dma_pe and pnv_pci_ioda2_setup_dma_pe as this is where DMA is actually initialized. This change is here because those lines had to be changed anyway. This should cause no behavioural change. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [aw: for the vfio related changes] Acked-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
227 lines
7.4 KiB
C
227 lines
7.4 KiB
C
/*
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* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
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* Rewrite, cleanup:
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* Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ASM_IOMMU_H
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#define _ASM_IOMMU_H
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <linux/spinlock.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/bitops.h>
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#include <asm/machdep.h>
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#include <asm/types.h>
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#include <asm/pci-bridge.h>
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#define IOMMU_PAGE_SHIFT_4K 12
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#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
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#define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
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#define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K)
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#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift)
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#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1))
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#define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr))
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/* Boot time flags */
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extern int iommu_is_off;
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extern int iommu_force_on;
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struct iommu_table_ops {
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int (*set)(struct iommu_table *tbl,
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long index, long npages,
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unsigned long uaddr,
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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void (*clear)(struct iommu_table *tbl,
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long index, long npages);
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unsigned long (*get)(struct iommu_table *tbl, long index);
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void (*flush)(struct iommu_table *tbl);
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};
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/* These are used by VIO */
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extern struct iommu_table_ops iommu_table_lpar_multi_ops;
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extern struct iommu_table_ops iommu_table_pseries_ops;
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/*
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* IOMAP_MAX_ORDER defines the largest contiguous block
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* of dma space we can get. IOMAP_MAX_ORDER = 13
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* allows up to 2**12 pages (4096 * 4096) = 16 MB
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*/
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#define IOMAP_MAX_ORDER 13
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#define IOMMU_POOL_HASHBITS 2
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#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS)
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struct iommu_pool {
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unsigned long start;
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unsigned long end;
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unsigned long hint;
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spinlock_t lock;
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} ____cacheline_aligned_in_smp;
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struct iommu_table {
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unsigned long it_busno; /* Bus number this table belongs to */
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unsigned long it_size; /* Size of iommu table in entries */
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unsigned long it_offset; /* Offset into global table */
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unsigned long it_base; /* mapped address of tce table */
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unsigned long it_index; /* which iommu table this is */
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unsigned long it_type; /* type: PCI or Virtual Bus */
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unsigned long it_blocksize; /* Entries in each block (cacheline) */
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unsigned long poolsize;
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unsigned long nr_pools;
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struct iommu_pool large_pool;
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struct iommu_pool pools[IOMMU_NR_POOLS];
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unsigned long *it_map; /* A simple allocation bitmap for now */
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unsigned long it_page_shift;/* table iommu page size */
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struct iommu_table_group *it_table_group;
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struct iommu_table_ops *it_ops;
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void (*set_bypass)(struct iommu_table *tbl, bool enable);
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};
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/* Pure 2^n version of get_order */
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static inline __attribute_const__
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int get_iommu_order(unsigned long size, struct iommu_table *tbl)
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{
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return __ilog2((size - 1) >> tbl->it_page_shift) + 1;
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}
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struct scatterlist;
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static inline void set_iommu_table_base(struct device *dev, void *base)
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{
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dev->archdata.dma_data.iommu_table_base = base;
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}
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static inline void *get_iommu_table_base(struct device *dev)
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{
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return dev->archdata.dma_data.iommu_table_base;
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}
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/* Frees table for an individual device node */
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extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
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/* Initializes an iommu_table based in values set in the passed-in
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* structure
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*/
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extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,
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int nid);
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#define IOMMU_TABLE_GROUP_MAX_TABLES 1
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struct iommu_table_group {
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struct iommu_group *group;
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struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES];
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};
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#ifdef CONFIG_IOMMU_API
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extern void iommu_register_group(struct iommu_table_group *table_group,
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int pci_domain_number, unsigned long pe_num);
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extern int iommu_add_device(struct device *dev);
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extern void iommu_del_device(struct device *dev);
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extern int __init tce_iommu_bus_notifier_init(void);
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#else
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static inline void iommu_register_group(struct iommu_table_group *table_group,
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int pci_domain_number,
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unsigned long pe_num)
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{
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}
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static inline int iommu_add_device(struct device *dev)
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{
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return 0;
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}
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static inline void iommu_del_device(struct device *dev)
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{
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}
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static inline int __init tce_iommu_bus_notifier_init(void)
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{
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return 0;
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}
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#endif /* !CONFIG_IOMMU_API */
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extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
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struct scatterlist *sglist, int nelems,
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unsigned long mask,
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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extern void ppc_iommu_unmap_sg(struct iommu_table *tbl,
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struct scatterlist *sglist,
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int nelems,
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
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size_t size, dma_addr_t *dma_handle,
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unsigned long mask, gfp_t flag, int node);
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extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
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struct page *page, unsigned long offset,
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size_t size, unsigned long mask,
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enum dma_data_direction direction,
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struct dma_attrs *attrs);
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extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction,
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struct dma_attrs *attrs);
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extern void iommu_init_early_pSeries(void);
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extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops);
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extern void iommu_init_early_pasemi(void);
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extern void alloc_dart_table(void);
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#if defined(CONFIG_PPC64) && defined(CONFIG_PM)
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static inline void iommu_save(void)
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{
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if (ppc_md.iommu_save)
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ppc_md.iommu_save();
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}
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static inline void iommu_restore(void)
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{
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if (ppc_md.iommu_restore)
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ppc_md.iommu_restore();
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}
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#endif
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/* The API to support IOMMU operations for VFIO */
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extern int iommu_tce_clear_param_check(struct iommu_table *tbl,
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unsigned long ioba, unsigned long tce_value,
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unsigned long npages);
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extern int iommu_tce_put_param_check(struct iommu_table *tbl,
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unsigned long ioba, unsigned long tce);
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extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,
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unsigned long hwaddr, enum dma_data_direction direction);
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extern unsigned long iommu_clear_tce(struct iommu_table *tbl,
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unsigned long entry);
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extern void iommu_flush_tce(struct iommu_table *tbl);
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extern int iommu_take_ownership(struct iommu_table *tbl);
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extern void iommu_release_ownership(struct iommu_table *tbl);
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extern enum dma_data_direction iommu_tce_direction(unsigned long tce);
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extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir);
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#endif /* __KERNEL__ */
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#endif /* _ASM_IOMMU_H */
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