5aa8e76476
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so search pipeline information to find out the correct possible crtc. Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
223 lines
6.1 KiB
C
223 lines
6.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef MTK_DRM_DDP_COMP_H
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#define MTK_DRM_DDP_COMP_H
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#include <linux/io.h>
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struct device;
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struct device_node;
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struct drm_crtc;
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struct drm_device;
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struct mtk_plane_state;
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struct drm_crtc_state;
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enum mtk_ddp_comp_type {
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MTK_DISP_OVL,
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MTK_DISP_OVL_2L,
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MTK_DISP_RDMA,
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MTK_DISP_WDMA,
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MTK_DISP_COLOR,
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MTK_DISP_CCORR,
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MTK_DISP_DITHER,
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MTK_DISP_AAL,
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MTK_DISP_GAMMA,
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MTK_DISP_UFOE,
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MTK_DSI,
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MTK_DPI,
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MTK_DISP_PWM,
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MTK_DISP_MUTEX,
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MTK_DISP_OD,
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MTK_DISP_BLS,
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MTK_DDP_COMP_TYPE_MAX,
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};
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enum mtk_ddp_comp_id {
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DDP_COMPONENT_AAL0,
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DDP_COMPONENT_AAL1,
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DDP_COMPONENT_BLS,
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DDP_COMPONENT_CCORR,
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DDP_COMPONENT_COLOR0,
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DDP_COMPONENT_COLOR1,
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DDP_COMPONENT_DITHER,
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DDP_COMPONENT_DPI0,
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DDP_COMPONENT_DPI1,
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DDP_COMPONENT_DSI0,
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DDP_COMPONENT_DSI1,
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DDP_COMPONENT_DSI2,
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DDP_COMPONENT_DSI3,
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DDP_COMPONENT_GAMMA,
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DDP_COMPONENT_OD0,
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DDP_COMPONENT_OD1,
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DDP_COMPONENT_OVL0,
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DDP_COMPONENT_OVL_2L0,
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DDP_COMPONENT_OVL_2L1,
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DDP_COMPONENT_OVL1,
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DDP_COMPONENT_PWM0,
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DDP_COMPONENT_PWM1,
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DDP_COMPONENT_PWM2,
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DDP_COMPONENT_RDMA0,
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DDP_COMPONENT_RDMA1,
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DDP_COMPONENT_RDMA2,
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DDP_COMPONENT_UFOE,
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DDP_COMPONENT_WDMA0,
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DDP_COMPONENT_WDMA1,
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DDP_COMPONENT_ID_MAX,
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};
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struct mtk_ddp_comp;
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struct cmdq_pkt;
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struct mtk_ddp_comp_funcs {
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void (*config)(struct mtk_ddp_comp *comp, unsigned int w,
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unsigned int h, unsigned int vrefresh,
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unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
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void (*start)(struct mtk_ddp_comp *comp);
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void (*stop)(struct mtk_ddp_comp *comp);
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void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc);
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void (*disable_vblank)(struct mtk_ddp_comp *comp);
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unsigned int (*supported_rotations)(struct mtk_ddp_comp *comp);
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unsigned int (*layer_nr)(struct mtk_ddp_comp *comp);
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int (*layer_check)(struct mtk_ddp_comp *comp,
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unsigned int idx,
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struct mtk_plane_state *state);
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void (*layer_config)(struct mtk_ddp_comp *comp, unsigned int idx,
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struct mtk_plane_state *state,
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struct cmdq_pkt *cmdq_pkt);
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void (*gamma_set)(struct mtk_ddp_comp *comp,
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struct drm_crtc_state *state);
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void (*bgclr_in_on)(struct mtk_ddp_comp *comp);
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void (*bgclr_in_off)(struct mtk_ddp_comp *comp);
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void (*ctm_set)(struct mtk_ddp_comp *comp,
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struct drm_crtc_state *state);
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};
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struct mtk_ddp_comp {
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struct clk *clk;
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void __iomem *regs;
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int irq;
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struct device *larb_dev;
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enum mtk_ddp_comp_id id;
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const struct mtk_ddp_comp_funcs *funcs;
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resource_size_t regs_pa;
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u8 subsys;
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};
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static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp,
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unsigned int w, unsigned int h,
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unsigned int vrefresh, unsigned int bpc,
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struct cmdq_pkt *cmdq_pkt)
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{
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if (comp->funcs && comp->funcs->config)
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comp->funcs->config(comp, w, h, vrefresh, bpc, cmdq_pkt);
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}
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static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->start)
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comp->funcs->start(comp);
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}
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static inline void mtk_ddp_comp_stop(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->stop)
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comp->funcs->stop(comp);
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}
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static inline void mtk_ddp_comp_enable_vblank(struct mtk_ddp_comp *comp,
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struct drm_crtc *crtc)
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{
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if (comp->funcs && comp->funcs->enable_vblank)
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comp->funcs->enable_vblank(comp, crtc);
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}
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static inline void mtk_ddp_comp_disable_vblank(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->disable_vblank)
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comp->funcs->disable_vblank(comp);
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}
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static inline
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unsigned int mtk_ddp_comp_supported_rotations(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->supported_rotations)
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return comp->funcs->supported_rotations(comp);
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return 0;
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}
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static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->layer_nr)
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return comp->funcs->layer_nr(comp);
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return 0;
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}
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static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp,
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unsigned int idx,
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struct mtk_plane_state *state)
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{
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if (comp->funcs && comp->funcs->layer_check)
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return comp->funcs->layer_check(comp, idx, state);
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return 0;
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}
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static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
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unsigned int idx,
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struct mtk_plane_state *state,
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struct cmdq_pkt *cmdq_pkt)
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{
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if (comp->funcs && comp->funcs->layer_config)
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comp->funcs->layer_config(comp, idx, state, cmdq_pkt);
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}
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static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
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struct drm_crtc_state *state)
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{
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if (comp->funcs && comp->funcs->gamma_set)
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comp->funcs->gamma_set(comp, state);
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}
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static inline void mtk_ddp_comp_bgclr_in_on(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->bgclr_in_on)
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comp->funcs->bgclr_in_on(comp);
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}
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static inline void mtk_ddp_comp_bgclr_in_off(struct mtk_ddp_comp *comp)
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{
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if (comp->funcs && comp->funcs->bgclr_in_off)
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comp->funcs->bgclr_in_off(comp);
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}
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static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
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struct drm_crtc_state *state)
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{
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if (comp->funcs && comp->funcs->ctm_set)
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comp->funcs->ctm_set(comp, state);
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}
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int mtk_ddp_comp_get_id(struct device_node *node,
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enum mtk_ddp_comp_type comp_type);
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unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
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struct mtk_ddp_comp ddp_comp);
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int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
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struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
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const struct mtk_ddp_comp_funcs *funcs);
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int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp);
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void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
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void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
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unsigned int CFG, struct cmdq_pkt *cmdq_pkt);
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enum mtk_ddp_comp_type mtk_ddp_comp_get_type(enum mtk_ddp_comp_id comp_id);
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void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
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struct mtk_ddp_comp *comp, unsigned int offset);
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void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value,
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struct mtk_ddp_comp *comp, unsigned int offset);
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void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value,
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struct mtk_ddp_comp *comp, unsigned int offset,
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unsigned int mask);
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#endif /* MTK_DRM_DDP_COMP_H */
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