forked from Minki/linux
d691b7e7d1
Highlights include: - Support for STRICT_KERNEL_RWX on 64-bit server CPUs. - Platform support for FSP2 (476fpe) board - Enable ZONE_DEVICE on 64-bit server CPUs. - Generic & powerpc spin loop primitives to optimise busy waiting - Convert VDSO update function to use new update_vsyscall() interface - Optimisations to hypercall/syscall/context-switch paths - Improvements to the CPU idle code on Power8 and Power9. As well as many other fixes and improvements. Thanks to: Akshay Adiga, Andrew Donnellan, Andrew Jeffery, Anshuman Khandual, Anton Blanchard, Balbir Singh, Benjamin Herrenschmidt, Christophe Leroy, Christophe Lombard, Colin Ian King, Dan Carpenter, Gautham R. Shenoy, Hari Bathini, Ian Munsie, Ivan Mikhaylov, Javier Martinez Canillas, Madhavan Srinivasan, Masahiro Yamada, Matt Brown, Michael Neuling, Michal Suchanek, Murilo Opsfelder Araujo, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pavel Machek, Russell Currey, Santosh Sivaraj, Stephen Rothwell, Thiago Jung Bauermann, Yang Li. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZXyPCAAoJEFHr6jzI4aWAI9QQAISf2x5y//cqCi4ISyQB5pTq KLS/yQajNkQOw7c0fzBZOaH5Xd/SJ6AcKWDg8yDlpDR3+sRRsr98iIRECgKS5I7/ DxD9ywcbSoMXFQQo1ZMCp5CeuMUIJRtugBnUQM+JXCSUCPbznCY5DchDTLyTBTpO MeMVhI//JxthhoOMA9MudiEGaYCU9ho442Z4OJUSiLUv8WRbvQX9pTqoc4vx1fxA BWf2mflztBVcIfKIyxIIIlDLukkMzix6gSYPMCbC7lzkbnU7JSqKiheJXjo1gJS2 ePHKDxeNR2/QP0g/j3aT/MR1uTt9MaNBSX3gANE1xQ9OoJ8m1sOtCO4gNbSdLWae eXhDnoiEp930DRZOeEioOItuWWoxFaMyYk3BMmRKV4QNdYL3y3TRVeL2/XmRGqYL Lxz4IY/x5TteFEJNGcRX90uizNSi8AaEXPF16pUk8Ctt6eH3ZSwPMv2fHeYVCMr0 KFlKHyaPEKEoztyzLcUR6u9QB56yxDN58bvLpd32AeHvKhqyxFoySy59x9bZbatn B2y8mmDItg860e0tIG6jrtplpOVvL8i5jla5RWFVoQDuxxrLAds3vG9JZQs+eRzx Fiic93bqeUAS6RzhXbJ6QQJYIyhE7yqpcgv7ME1W87SPef3HPBk9xlp3yIDwdA2z bBDvrRnvupusz8qCWrxe =w8rj -----END PGP SIGNATURE----- Merge tag 'powerpc-4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: "Highlights include: - Support for STRICT_KERNEL_RWX on 64-bit server CPUs. - Platform support for FSP2 (476fpe) board - Enable ZONE_DEVICE on 64-bit server CPUs. - Generic & powerpc spin loop primitives to optimise busy waiting - Convert VDSO update function to use new update_vsyscall() interface - Optimisations to hypercall/syscall/context-switch paths - Improvements to the CPU idle code on Power8 and Power9. As well as many other fixes and improvements. Thanks to: Akshay Adiga, Andrew Donnellan, Andrew Jeffery, Anshuman Khandual, Anton Blanchard, Balbir Singh, Benjamin Herrenschmidt, Christophe Leroy, Christophe Lombard, Colin Ian King, Dan Carpenter, Gautham R. Shenoy, Hari Bathini, Ian Munsie, Ivan Mikhaylov, Javier Martinez Canillas, Madhavan Srinivasan, Masahiro Yamada, Matt Brown, Michael Neuling, Michal Suchanek, Murilo Opsfelder Araujo, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pavel Machek, Russell Currey, Santosh Sivaraj, Stephen Rothwell, Thiago Jung Bauermann, Yang Li" * tag 'powerpc-4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (158 commits) powerpc/Kconfig: Enable STRICT_KERNEL_RWX for some configs powerpc/mm/radix: Implement STRICT_RWX/mark_rodata_ro() for Radix powerpc/mm/hash: Implement mark_rodata_ro() for hash powerpc/vmlinux.lds: Align __init_begin to 16M powerpc/lib/code-patching: Use alternate map for patch_instruction() powerpc/xmon: Add patch_instruction() support for xmon powerpc/kprobes/optprobes: Use patch_instruction() powerpc/kprobes: Move kprobes over to patch_instruction() powerpc/mm/radix: Fix execute permissions for interrupt_vectors powerpc/pseries: Fix passing of pp0 in updatepp() and updateboltedpp() powerpc/64s: Blacklist rtas entry/exit from kprobes powerpc/64s: Blacklist functions invoked on a trap powerpc/64s: Un-blacklist system_call() from kprobes powerpc/64s: Move system_call() symbol to just after setting MSR_EE powerpc/64s: Blacklist system_call() and system_call_common() from kprobes powerpc/64s: Convert .L__replay_interrupt_return to a local label powerpc64/elfv1: Only dereference function descriptor for non-text symbols cxl: Export library to support IBM XSL powerpc/dts: Use #include "..." to include local DT powerpc/perf/hv-24x7: Aggregate result elements on POWER9 SMT8 ...
760 lines
28 KiB
C
760 lines
28 KiB
C
/*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/suspend.h>
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#include <linux/hrtimer.h>
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#ifdef CONFIG_PPC64
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#include <linux/time.h>
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#include <linux/hardirq.h>
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#endif
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#include <linux/kbuild.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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#include <asm/rtas.h>
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#include <asm/vdso_datapage.h>
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#include <asm/dbell.h>
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/lppaca.h>
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#include <asm/cache.h>
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#include <asm/compat.h>
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#include <asm/mmu.h>
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#include <asm/hvcall.h>
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#include <asm/xics.h>
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#endif
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#ifdef CONFIG_PPC_POWERNV
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#include <asm/opal.h>
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#endif
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#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
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#include <linux/kvm_host.h>
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#endif
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#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
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#include <asm/kvm_book3s.h>
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#include <asm/kvm_ppc.h>
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#endif
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#ifdef CONFIG_PPC32
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#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
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#include "head_booke.h"
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#endif
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#endif
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#if defined(CONFIG_PPC_FSL_BOOK3E)
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#include "../mm/mmu_decl.h"
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#endif
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#ifdef CONFIG_PPC_8xx
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#include <asm/fixmap.h>
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#endif
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#define STACK_PT_REGS_OFFSET(sym, val) \
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DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
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int main(void)
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{
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OFFSET(THREAD, task_struct, thread);
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OFFSET(MM, task_struct, mm);
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OFFSET(MMCONTEXTID, mm_struct, context.id);
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#ifdef CONFIG_PPC64
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DEFINE(SIGSEGV, SIGSEGV);
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DEFINE(NMI_MASK, NMI_MASK);
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OFFSET(TASKTHREADPPR, task_struct, thread.ppr);
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#else
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OFFSET(THREAD_INFO, task_struct, stack);
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DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
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OFFSET(KSP_LIMIT, thread_struct, ksp_limit);
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#endif /* CONFIG_PPC64 */
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#ifdef CONFIG_LIVEPATCH
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OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
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#endif
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OFFSET(KSP, thread_struct, ksp);
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OFFSET(PT_REGS, thread_struct, regs);
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#ifdef CONFIG_BOOKE
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OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
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#endif
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OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
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OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
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OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
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OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
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OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
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#ifdef CONFIG_ALTIVEC
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OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
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OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
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OFFSET(THREAD_VRSAVE, thread_struct, vrsave);
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OFFSET(THREAD_USED_VR, thread_struct, used_vr);
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OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
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OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_PPC64
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OFFSET(KSP_VSID, thread_struct, ksp_vsid);
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#else /* CONFIG_PPC64 */
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OFFSET(PGDIR, thread_struct, pgdir);
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#ifdef CONFIG_SPE
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OFFSET(THREAD_EVR0, thread_struct, evr[0]);
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OFFSET(THREAD_ACC, thread_struct, acc);
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OFFSET(THREAD_SPEFSCR, thread_struct, spefscr);
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OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
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#endif /* CONFIG_SPE */
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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OFFSET(THREAD_DBCR0, thread_struct, debug.dbcr0);
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#endif
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#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
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OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
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#endif
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#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
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OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
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#endif
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
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OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
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OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
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OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
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OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
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OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
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OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
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OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
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OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
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OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
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OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
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/* Local pt_regs on stack for Transactional Memory funcs. */
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DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
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sizeof(struct pt_regs) + 16);
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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OFFSET(TI_FLAGS, thread_info, flags);
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OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
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OFFSET(TI_PREEMPT, thread_info, preempt_count);
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OFFSET(TI_TASK, thread_info, task);
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OFFSET(TI_CPU, thread_info, cpu);
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#ifdef CONFIG_PPC64
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OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
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OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
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OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page);
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OFFSET(ICACHEL1BLOCKSIZE, ppc64_caches, l1i.block_size);
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OFFSET(ICACHEL1LOGBLOCKSIZE, ppc64_caches, l1i.log_block_size);
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OFFSET(ICACHEL1BLOCKSPERPAGE, ppc64_caches, l1i.blocks_per_page);
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/* paca */
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DEFINE(PACA_SIZE, sizeof(struct paca_struct));
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OFFSET(PACAPACAINDEX, paca_struct, paca_index);
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OFFSET(PACAPROCSTART, paca_struct, cpu_start);
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OFFSET(PACAKSAVE, paca_struct, kstack);
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OFFSET(PACACURRENT, paca_struct, __current);
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OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
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OFFSET(PACASTABRR, paca_struct, stab_rr);
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OFFSET(PACAR1, paca_struct, saved_r1);
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OFFSET(PACATOC, paca_struct, kernel_toc);
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OFFSET(PACAKBASE, paca_struct, kernelbase);
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OFFSET(PACAKMSR, paca_struct, kernel_msr);
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OFFSET(PACASOFTIRQEN, paca_struct, soft_enabled);
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OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
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#ifdef CONFIG_PPC_BOOK3S
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OFFSET(PACACONTEXTID, paca_struct, mm_ctx_id);
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#ifdef CONFIG_PPC_MM_SLICES
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OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
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OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
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DEFINE(PACA_ADDR_LIMIT, offsetof(struct paca_struct, addr_limit));
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DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
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#endif /* CONFIG_PPC_MM_SLICES */
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#endif
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#ifdef CONFIG_PPC_BOOK3E
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OFFSET(PACAPGD, paca_struct, pgd);
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OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
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OFFSET(PACA_EXGEN, paca_struct, exgen);
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OFFSET(PACA_EXTLB, paca_struct, extlb);
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OFFSET(PACA_EXMC, paca_struct, exmc);
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OFFSET(PACA_EXCRIT, paca_struct, excrit);
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OFFSET(PACA_EXDBG, paca_struct, exdbg);
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OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
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OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
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OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
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OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
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OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
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OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
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OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
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#endif /* CONFIG_PPC_BOOK3E */
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#ifdef CONFIG_PPC_STD_MMU_64
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OFFSET(PACASLBCACHE, paca_struct, slb_cache);
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OFFSET(PACASLBCACHEPTR, paca_struct, slb_cache_ptr);
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OFFSET(PACAVMALLOCSLLP, paca_struct, vmalloc_sllp);
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#ifdef CONFIG_PPC_MM_SLICES
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OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
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#else
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OFFSET(PACACONTEXTSLLP, paca_struct, mm_ctx_sllp);
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#endif /* CONFIG_PPC_MM_SLICES */
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OFFSET(PACA_EXGEN, paca_struct, exgen);
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OFFSET(PACA_EXMC, paca_struct, exmc);
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OFFSET(PACA_EXSLB, paca_struct, exslb);
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OFFSET(PACA_EXNMI, paca_struct, exnmi);
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OFFSET(PACALPPACAPTR, paca_struct, lppaca_ptr);
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OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
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OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
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OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
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OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
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OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
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OFFSET(LPPACA_DTLIDX, lppaca, dtl_idx);
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OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
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OFFSET(PACA_DTL_RIDX, paca_struct, dtl_ridx);
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#endif /* CONFIG_PPC_STD_MMU_64 */
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OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
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#ifdef CONFIG_PPC_BOOK3S_64
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OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
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OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
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OFFSET(PACA_IN_MCE, paca_struct, in_mce);
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OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
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#endif
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OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
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OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
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OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
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OFFSET(ACCOUNT_STARTTIME, paca_struct, accounting.starttime);
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OFFSET(ACCOUNT_STARTTIME_USER, paca_struct, accounting.starttime_user);
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OFFSET(ACCOUNT_USER_TIME, paca_struct, accounting.utime);
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OFFSET(ACCOUNT_SYSTEM_TIME, paca_struct, accounting.stime);
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OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
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OFFSET(PACA_NAPSTATELOST, paca_struct, nap_state_lost);
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OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
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#else /* CONFIG_PPC64 */
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
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OFFSET(ACCOUNT_STARTTIME, thread_info, accounting.starttime);
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OFFSET(ACCOUNT_STARTTIME_USER, thread_info, accounting.starttime_user);
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OFFSET(ACCOUNT_USER_TIME, thread_info, accounting.utime);
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OFFSET(ACCOUNT_SYSTEM_TIME, thread_info, accounting.stime);
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#endif
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#endif /* CONFIG_PPC64 */
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/* RTAS */
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OFFSET(RTASBASE, rtas_t, base);
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OFFSET(RTASENTRY, rtas_t, entry);
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/* Interrupt register frame */
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DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
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DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
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#ifdef CONFIG_PPC64
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/* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
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DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
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DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
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#endif /* CONFIG_PPC64 */
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STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
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STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
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STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
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STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
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STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
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STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
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STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
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STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
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STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
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STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
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STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
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STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
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STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
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STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
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#ifndef CONFIG_PPC64
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STACK_PT_REGS_OFFSET(GPR14, gpr[14]);
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#endif /* CONFIG_PPC64 */
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/*
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* Note: these symbols include _ because they overlap with special
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* register names
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*/
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STACK_PT_REGS_OFFSET(_NIP, nip);
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STACK_PT_REGS_OFFSET(_MSR, msr);
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STACK_PT_REGS_OFFSET(_CTR, ctr);
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STACK_PT_REGS_OFFSET(_LINK, link);
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STACK_PT_REGS_OFFSET(_CCR, ccr);
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STACK_PT_REGS_OFFSET(_XER, xer);
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STACK_PT_REGS_OFFSET(_DAR, dar);
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STACK_PT_REGS_OFFSET(_DSISR, dsisr);
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STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
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STACK_PT_REGS_OFFSET(RESULT, result);
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STACK_PT_REGS_OFFSET(_TRAP, trap);
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#ifndef CONFIG_PPC64
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/*
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* The PowerPC 400-class & Book-E processors have neither the DAR
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* nor the DSISR SPRs. Hence, we overload them to hold the similar
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* DEAR and ESR SPRs for such processors. For critical interrupts
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* we use them to hold SRR0 and SRR1.
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*/
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STACK_PT_REGS_OFFSET(_DEAR, dar);
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STACK_PT_REGS_OFFSET(_ESR, dsisr);
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#else /* CONFIG_PPC64 */
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STACK_PT_REGS_OFFSET(SOFTE, softe);
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/* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
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DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
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DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_PPC32)
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#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
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DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
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DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
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/* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
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DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
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DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
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DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
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DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
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DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
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DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
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DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
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DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
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DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
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DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
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DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
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DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
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DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
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#endif
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#endif
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#ifndef CONFIG_PPC64
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OFFSET(MM_PGD, mm_struct, pgd);
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#endif /* ! CONFIG_PPC64 */
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/* About the CPU features table */
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OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
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OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
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OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
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OFFSET(pbe_address, pbe, address);
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OFFSET(pbe_orig_address, pbe, orig_address);
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OFFSET(pbe_next, pbe, next);
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#ifndef CONFIG_PPC64
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DEFINE(TASK_SIZE, TASK_SIZE);
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DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
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#endif /* ! CONFIG_PPC64 */
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/* datapage offsets for use by vdso */
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OFFSET(CFG_TB_ORIG_STAMP, vdso_data, tb_orig_stamp);
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OFFSET(CFG_TB_TICKS_PER_SEC, vdso_data, tb_ticks_per_sec);
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OFFSET(CFG_TB_TO_XS, vdso_data, tb_to_xs);
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OFFSET(CFG_TB_UPDATE_COUNT, vdso_data, tb_update_count);
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OFFSET(CFG_TZ_MINUTEWEST, vdso_data, tz_minuteswest);
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OFFSET(CFG_TZ_DSTTIME, vdso_data, tz_dsttime);
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OFFSET(CFG_SYSCALL_MAP32, vdso_data, syscall_map_32);
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OFFSET(WTOM_CLOCK_SEC, vdso_data, wtom_clock_sec);
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OFFSET(WTOM_CLOCK_NSEC, vdso_data, wtom_clock_nsec);
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OFFSET(STAMP_XTIME, vdso_data, stamp_xtime);
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OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
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OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
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OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
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OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
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OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
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#ifdef CONFIG_PPC64
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OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
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OFFSET(TVAL64_TV_SEC, timeval, tv_sec);
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OFFSET(TVAL64_TV_USEC, timeval, tv_usec);
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OFFSET(TVAL32_TV_SEC, compat_timeval, tv_sec);
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OFFSET(TVAL32_TV_USEC, compat_timeval, tv_usec);
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OFFSET(TSPC64_TV_SEC, timespec, tv_sec);
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OFFSET(TSPC64_TV_NSEC, timespec, tv_nsec);
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OFFSET(TSPC32_TV_SEC, compat_timespec, tv_sec);
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OFFSET(TSPC32_TV_NSEC, compat_timespec, tv_nsec);
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#else
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OFFSET(TVAL32_TV_SEC, timeval, tv_sec);
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OFFSET(TVAL32_TV_USEC, timeval, tv_usec);
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OFFSET(TSPC32_TV_SEC, timespec, tv_sec);
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OFFSET(TSPC32_TV_NSEC, timespec, tv_nsec);
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#endif
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/* timeval/timezone offsets for use by vdso */
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OFFSET(TZONE_TZ_MINWEST, timezone, tz_minuteswest);
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OFFSET(TZONE_TZ_DSTTIME, timezone, tz_dsttime);
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/* Other bits used by the vdso */
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DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
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DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
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DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
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DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
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#ifdef CONFIG_BUG
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DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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DEFINE(PGD_TABLE_SIZE, (sizeof(pgd_t) << max(RADIX_PGD_INDEX_SIZE, H_PGD_INDEX_SIZE)));
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#else
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DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
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#endif
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DEFINE(PTE_SIZE, sizeof(pte_t));
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#ifdef CONFIG_KVM
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OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
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OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
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OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
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OFFSET(VCPU_GPRS, kvm_vcpu, arch.gpr);
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OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
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OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
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#ifdef CONFIG_ALTIVEC
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OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
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#endif
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OFFSET(VCPU_XER, kvm_vcpu, arch.xer);
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OFFSET(VCPU_CTR, kvm_vcpu, arch.ctr);
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OFFSET(VCPU_LR, kvm_vcpu, arch.lr);
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#ifdef CONFIG_PPC_BOOK3S
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OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
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#endif
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OFFSET(VCPU_CR, kvm_vcpu, arch.cr);
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OFFSET(VCPU_PC, kvm_vcpu, arch.pc);
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
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OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
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OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
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OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
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OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
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OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
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OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
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#endif
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#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
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OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
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OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
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OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
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OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
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OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
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OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
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OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
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OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
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OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
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OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
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OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
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#endif
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OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
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OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
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OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
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OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
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OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
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OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
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OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
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OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
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OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
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OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
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#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
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OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
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#endif
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OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
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OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
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OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
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OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
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OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
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OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
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OFFSET(VCPU_KVM, kvm_vcpu, kvm);
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OFFSET(KVM_LPID, kvm, arch.lpid);
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/* book3s */
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
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OFFSET(KVM_SDR1, kvm, arch.sdr1);
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OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
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OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
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OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
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OFFSET(KVM_NEED_FLUSH, kvm, arch.need_tlb_flush.bits);
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OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
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OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
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OFFSET(KVM_RADIX, kvm, arch.radix);
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OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
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OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
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OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
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OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
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OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
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OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
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OFFSET(VCPU_CPU, kvm_vcpu, cpu);
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OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
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#endif
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#ifdef CONFIG_PPC_BOOK3S
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OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
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OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
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OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
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OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
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OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
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OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
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OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
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OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
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OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
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OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
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OFFSET(VCPU_DAWR, kvm_vcpu, arch.dawr);
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OFFSET(VCPU_DAWRX, kvm_vcpu, arch.dawrx);
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OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
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OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
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OFFSET(VCPU_DEC, kvm_vcpu, arch.dec);
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OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
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OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
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OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
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OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
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OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
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OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
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OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
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OFFSET(VCPU_SPMC, kvm_vcpu, arch.spmc);
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OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
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OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
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OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
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OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
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OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
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OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
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OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
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OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
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OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
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OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
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OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
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OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
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OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
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OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
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OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
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OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
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OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
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OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
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OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
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OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
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OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
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OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
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OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
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OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
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OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
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OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
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OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
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OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
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OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
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|
OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
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|
OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
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|
OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
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OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
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|
OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
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OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
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|
OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
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|
OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
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|
OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
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|
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
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|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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|
OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
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|
OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
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|
OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
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|
OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
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|
OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
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|
OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
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|
OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
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|
OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
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|
OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
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|
OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
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|
OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
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|
OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
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|
OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
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|
OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
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|
OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
|
|
OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
|
|
# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
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|
#else
|
|
# define SVCPU_FIELD(x, f)
|
|
#endif
|
|
# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
|
|
#else /* 32-bit */
|
|
# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
|
|
# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
|
|
#endif
|
|
|
|
SVCPU_FIELD(SVCPU_CR, cr);
|
|
SVCPU_FIELD(SVCPU_XER, xer);
|
|
SVCPU_FIELD(SVCPU_CTR, ctr);
|
|
SVCPU_FIELD(SVCPU_LR, lr);
|
|
SVCPU_FIELD(SVCPU_PC, pc);
|
|
SVCPU_FIELD(SVCPU_R0, gpr[0]);
|
|
SVCPU_FIELD(SVCPU_R1, gpr[1]);
|
|
SVCPU_FIELD(SVCPU_R2, gpr[2]);
|
|
SVCPU_FIELD(SVCPU_R3, gpr[3]);
|
|
SVCPU_FIELD(SVCPU_R4, gpr[4]);
|
|
SVCPU_FIELD(SVCPU_R5, gpr[5]);
|
|
SVCPU_FIELD(SVCPU_R6, gpr[6]);
|
|
SVCPU_FIELD(SVCPU_R7, gpr[7]);
|
|
SVCPU_FIELD(SVCPU_R8, gpr[8]);
|
|
SVCPU_FIELD(SVCPU_R9, gpr[9]);
|
|
SVCPU_FIELD(SVCPU_R10, gpr[10]);
|
|
SVCPU_FIELD(SVCPU_R11, gpr[11]);
|
|
SVCPU_FIELD(SVCPU_R12, gpr[12]);
|
|
SVCPU_FIELD(SVCPU_R13, gpr[13]);
|
|
SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
|
|
SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
|
|
SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
|
|
SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
|
|
#ifdef CONFIG_PPC_BOOK3S_32
|
|
SVCPU_FIELD(SVCPU_SR, sr);
|
|
#endif
|
|
#ifdef CONFIG_PPC64
|
|
SVCPU_FIELD(SVCPU_SLB, slb);
|
|
SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
|
|
SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
|
|
#endif
|
|
|
|
HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
|
|
HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
|
|
HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
|
|
HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
|
|
HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
|
|
HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
|
|
HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
|
|
HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
|
|
HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
|
|
HSTATE_FIELD(HSTATE_NAPPING, napping);
|
|
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
|
HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
|
|
HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
|
|
HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
|
|
HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
|
|
HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
|
|
HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
|
|
HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
|
|
HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
|
|
HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
|
|
HSTATE_FIELD(HSTATE_PTID, ptid);
|
|
HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
|
|
HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
|
|
HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
|
|
HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
|
|
HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
|
|
HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
|
|
HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
|
|
HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
|
|
HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
|
|
HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
|
|
HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
|
|
HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
|
|
HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
|
|
HSTATE_FIELD(HSTATE_PURR, host_purr);
|
|
HSTATE_FIELD(HSTATE_SPURR, host_spurr);
|
|
HSTATE_FIELD(HSTATE_DSCR, host_dscr);
|
|
HSTATE_FIELD(HSTATE_DABR, dabr);
|
|
HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
|
|
HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
|
|
DEFINE(IPI_PRIORITY, IPI_PRIORITY);
|
|
OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
|
|
OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
|
|
OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
|
|
OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
|
|
OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
|
|
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
HSTATE_FIELD(HSTATE_CFAR, cfar);
|
|
HSTATE_FIELD(HSTATE_PPR, ppr);
|
|
HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
#else /* CONFIG_PPC_BOOK3S */
|
|
OFFSET(VCPU_CR, kvm_vcpu, arch.cr);
|
|
OFFSET(VCPU_XER, kvm_vcpu, arch.xer);
|
|
OFFSET(VCPU_LR, kvm_vcpu, arch.lr);
|
|
OFFSET(VCPU_CTR, kvm_vcpu, arch.ctr);
|
|
OFFSET(VCPU_PC, kvm_vcpu, arch.pc);
|
|
OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
|
|
OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
|
|
OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
|
|
OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
|
|
OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
|
|
#endif /* CONFIG_PPC_BOOK3S */
|
|
#endif /* CONFIG_KVM */
|
|
|
|
#ifdef CONFIG_KVM_GUEST
|
|
OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
|
|
OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
|
|
OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
|
|
OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
|
|
OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
|
|
OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
|
|
OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
|
|
#endif
|
|
|
|
#ifdef CONFIG_44x
|
|
DEFINE(PGD_T_LOG2, PGD_T_LOG2);
|
|
DEFINE(PTE_T_LOG2, PTE_T_LOG2);
|
|
#endif
|
|
#ifdef CONFIG_PPC_FSL_BOOK3E
|
|
DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
|
|
OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
|
|
OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
|
|
OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
|
|
OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
|
|
OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
|
|
#endif
|
|
|
|
#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
|
|
OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
|
|
OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
|
|
OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
|
|
OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_BOOKE_HV
|
|
OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
|
|
OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_XICS
|
|
DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
|
|
arch.xive_saved_state));
|
|
DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
|
|
arch.xive_cam_word));
|
|
DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_EXIT_TIMING
|
|
OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
|
|
OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
|
|
OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
|
|
OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_POWERNV
|
|
OFFSET(PACA_CORE_IDLE_STATE_PTR, paca_struct, core_idle_state_ptr);
|
|
OFFSET(PACA_THREAD_IDLE_STATE, paca_struct, thread_idle_state);
|
|
OFFSET(PACA_THREAD_MASK, paca_struct, thread_mask);
|
|
OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
|
|
OFFSET(PACA_SIBLING_PACA_PTRS, paca_struct, thread_sibling_pacas);
|
|
OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
|
|
#endif
|
|
|
|
DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
|
|
DEFINE(PPC_DBELL_MSGTYPE, PPC_DBELL_MSGTYPE);
|
|
|
|
#ifdef CONFIG_PPC_8xx
|
|
DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
|
|
#endif
|
|
|
|
return 0;
|
|
}
|