forked from Minki/linux
af6d0423df
Create DSI encoders during modeset_init. The 2 encoders should ideally be one command mode and one video mode DSI encoder respectively, but we don't support command mode yet. We just create 2 of the same because the dsi driver expects it, we end up using only the first one. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
627 lines
16 KiB
C
627 lines
16 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "msm_drv.h"
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#include "msm_mmu.h"
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#include "mdp4_kms.h"
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static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev);
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static int mdp4_hw_init(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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struct drm_device *dev = mdp4_kms->dev;
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uint32_t version, major, minor, dmap_cfg, vg_cfg;
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unsigned long clk;
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int ret = 0;
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pm_runtime_get_sync(dev->dev);
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mdp4_enable(mdp4_kms);
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version = mdp4_read(mdp4_kms, REG_MDP4_VERSION);
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mdp4_disable(mdp4_kms);
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major = FIELD(version, MDP4_VERSION_MAJOR);
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minor = FIELD(version, MDP4_VERSION_MINOR);
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DBG("found MDP4 version v%d.%d", major, minor);
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if (major != 4) {
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dev_err(dev->dev, "unexpected MDP version: v%d.%d\n",
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major, minor);
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ret = -ENXIO;
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goto out;
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}
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mdp4_kms->rev = minor;
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if (mdp4_kms->dsi_pll_vdda) {
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if ((mdp4_kms->rev == 2) || (mdp4_kms->rev == 4)) {
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ret = regulator_set_voltage(mdp4_kms->dsi_pll_vdda,
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1200000, 1200000);
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if (ret) {
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dev_err(dev->dev,
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"failed to set dsi_pll_vdda voltage: %d\n", ret);
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goto out;
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}
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}
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}
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if (mdp4_kms->dsi_pll_vddio) {
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if (mdp4_kms->rev == 2) {
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ret = regulator_set_voltage(mdp4_kms->dsi_pll_vddio,
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1800000, 1800000);
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if (ret) {
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dev_err(dev->dev,
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"failed to set dsi_pll_vddio voltage: %d\n", ret);
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goto out;
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}
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}
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}
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if (mdp4_kms->rev > 1) {
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mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER0, 0x0707ffff);
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mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER1, 0x03073f3f);
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}
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mdp4_write(mdp4_kms, REG_MDP4_PORTMAP_MODE, 0x3);
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/* max read pending cmd config, 3 pending requests: */
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mdp4_write(mdp4_kms, REG_MDP4_READ_CNFG, 0x02222);
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clk = clk_get_rate(mdp4_kms->clk);
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if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) {
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dmap_cfg = 0x47; /* 16 bytes-burst x 8 req */
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vg_cfg = 0x47; /* 16 bytes-burs x 8 req */
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} else {
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dmap_cfg = 0x27; /* 8 bytes-burst x 8 req */
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vg_cfg = 0x43; /* 16 bytes-burst x 4 req */
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}
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DBG("fetch config: dmap=%02x, vg=%02x", dmap_cfg, vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_P), dmap_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_E), dmap_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG1), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG2), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB1), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB2), vg_cfg);
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if (mdp4_kms->rev >= 2)
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mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG_UPDATE_METHOD, 1);
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mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG, 0);
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/* disable CSC matrix / YUV by default: */
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG1), 0);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG2), 0);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_P_OP_MODE, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_S_OP_MODE, 0);
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mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(1), 0);
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mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(2), 0);
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if (mdp4_kms->rev > 1)
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mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1);
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dev->mode_config.allow_fb_modifiers = true;
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out:
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pm_runtime_put_sync(dev->dev);
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return ret;
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}
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static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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int i, ncrtcs = state->dev->mode_config.num_crtc;
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mdp4_enable(mdp4_kms);
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/* see 119ecb7fd */
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for (i = 0; i < ncrtcs; i++) {
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struct drm_crtc *crtc = state->crtcs[i];
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if (!crtc)
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continue;
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drm_crtc_vblank_get(crtc);
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}
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}
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static void mdp4_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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int i, ncrtcs = state->dev->mode_config.num_crtc;
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/* see 119ecb7fd */
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for (i = 0; i < ncrtcs; i++) {
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struct drm_crtc *crtc = state->crtcs[i];
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if (!crtc)
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continue;
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drm_crtc_vblank_put(crtc);
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}
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mdp4_disable(mdp4_kms);
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}
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static void mdp4_wait_for_crtc_commit_done(struct msm_kms *kms,
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struct drm_crtc *crtc)
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{
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mdp4_crtc_wait_for_commit_done(crtc);
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}
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static long mdp4_round_pixclk(struct msm_kms *kms, unsigned long rate,
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struct drm_encoder *encoder)
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{
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/* if we had >1 encoder, we'd need something more clever: */
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switch (encoder->encoder_type) {
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case DRM_MODE_ENCODER_TMDS:
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return mdp4_dtv_round_pixclk(encoder, rate);
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case DRM_MODE_ENCODER_LVDS:
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case DRM_MODE_ENCODER_DSI:
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default:
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return rate;
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}
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}
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static void mdp4_preclose(struct msm_kms *kms, struct drm_file *file)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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struct msm_drm_private *priv = mdp4_kms->dev->dev_private;
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unsigned i;
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for (i = 0; i < priv->num_crtcs; i++)
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mdp4_crtc_cancel_pending_flip(priv->crtcs[i], file);
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}
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static void mdp4_destroy(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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if (mdp4_kms->blank_cursor_iova)
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msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);
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if (mdp4_kms->blank_cursor_bo)
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drm_gem_object_unreference_unlocked(mdp4_kms->blank_cursor_bo);
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kfree(mdp4_kms);
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}
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static const struct mdp_kms_funcs kms_funcs = {
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.base = {
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.hw_init = mdp4_hw_init,
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.irq_preinstall = mdp4_irq_preinstall,
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.irq_postinstall = mdp4_irq_postinstall,
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.irq_uninstall = mdp4_irq_uninstall,
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.irq = mdp4_irq,
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.enable_vblank = mdp4_enable_vblank,
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.disable_vblank = mdp4_disable_vblank,
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.prepare_commit = mdp4_prepare_commit,
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.complete_commit = mdp4_complete_commit,
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.wait_for_crtc_commit_done = mdp4_wait_for_crtc_commit_done,
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.get_format = mdp_get_format,
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.round_pixclk = mdp4_round_pixclk,
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.preclose = mdp4_preclose,
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.destroy = mdp4_destroy,
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},
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.set_irqmask = mdp4_set_irqmask,
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};
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int mdp4_disable(struct mdp4_kms *mdp4_kms)
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{
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DBG("");
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clk_disable_unprepare(mdp4_kms->clk);
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if (mdp4_kms->pclk)
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clk_disable_unprepare(mdp4_kms->pclk);
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clk_disable_unprepare(mdp4_kms->lut_clk);
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if (mdp4_kms->axi_clk)
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clk_disable_unprepare(mdp4_kms->axi_clk);
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return 0;
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}
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int mdp4_enable(struct mdp4_kms *mdp4_kms)
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{
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DBG("");
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clk_prepare_enable(mdp4_kms->clk);
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if (mdp4_kms->pclk)
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clk_prepare_enable(mdp4_kms->pclk);
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clk_prepare_enable(mdp4_kms->lut_clk);
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if (mdp4_kms->axi_clk)
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clk_prepare_enable(mdp4_kms->axi_clk);
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return 0;
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}
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static struct device_node *mdp4_detect_lcdc_panel(struct drm_device *dev)
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{
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struct device_node *endpoint, *panel_node;
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struct device_node *np = dev->dev->of_node;
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endpoint = of_graph_get_next_endpoint(np, NULL);
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if (!endpoint) {
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DBG("no endpoint in MDP4 to fetch LVDS panel\n");
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return NULL;
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}
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/* don't proceed if we have an endpoint but no panel_node tied to it */
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panel_node = of_graph_get_remote_port_parent(endpoint);
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if (!panel_node) {
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dev_err(dev->dev, "no valid panel node\n");
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of_node_put(endpoint);
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return ERR_PTR(-ENODEV);
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}
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of_node_put(endpoint);
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return panel_node;
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}
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static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
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int intf_type)
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{
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struct drm_device *dev = mdp4_kms->dev;
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struct msm_drm_private *priv = dev->dev_private;
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struct drm_encoder *encoder;
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struct drm_connector *connector;
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struct device_node *panel_node;
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struct drm_encoder *dsi_encs[MSM_DSI_ENCODER_NUM];
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int i, dsi_id;
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int ret;
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switch (intf_type) {
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case DRM_MODE_ENCODER_LVDS:
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/*
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* bail out early if:
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* - there is no panel node (no need to initialize lcdc
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* encoder and lvds connector), or
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* - panel node is a bad pointer
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*/
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panel_node = mdp4_detect_lcdc_panel(dev);
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if (IS_ERR_OR_NULL(panel_node))
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return PTR_ERR(panel_node);
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encoder = mdp4_lcdc_encoder_init(dev, panel_node);
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if (IS_ERR(encoder)) {
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dev_err(dev->dev, "failed to construct LCDC encoder\n");
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return PTR_ERR(encoder);
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}
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/* LCDC can be hooked to DMA_P (TODO: Add DMA_S later?) */
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encoder->possible_crtcs = 1 << DMA_P;
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connector = mdp4_lvds_connector_init(dev, panel_node, encoder);
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if (IS_ERR(connector)) {
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dev_err(dev->dev, "failed to initialize LVDS connector\n");
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return PTR_ERR(connector);
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}
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priv->encoders[priv->num_encoders++] = encoder;
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priv->connectors[priv->num_connectors++] = connector;
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break;
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case DRM_MODE_ENCODER_TMDS:
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encoder = mdp4_dtv_encoder_init(dev);
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if (IS_ERR(encoder)) {
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dev_err(dev->dev, "failed to construct DTV encoder\n");
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return PTR_ERR(encoder);
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}
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/* DTV can be hooked to DMA_E: */
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encoder->possible_crtcs = 1 << 1;
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if (priv->hdmi) {
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/* Construct bridge/connector for HDMI: */
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ret = hdmi_modeset_init(priv->hdmi, dev, encoder);
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if (ret) {
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dev_err(dev->dev, "failed to initialize HDMI: %d\n", ret);
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return ret;
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}
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}
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priv->encoders[priv->num_encoders++] = encoder;
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break;
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case DRM_MODE_ENCODER_DSI:
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/* only DSI1 supported for now */
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dsi_id = 0;
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if (!priv->dsi[dsi_id])
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break;
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for (i = 0; i < MSM_DSI_ENCODER_NUM; i++) {
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dsi_encs[i] = mdp4_dsi_encoder_init(dev);
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if (IS_ERR(dsi_encs[i])) {
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ret = PTR_ERR(dsi_encs[i]);
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dev_err(dev->dev,
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"failed to construct DSI encoder: %d\n",
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ret);
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return ret;
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}
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/* TODO: Add DMA_S later? */
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dsi_encs[i]->possible_crtcs = 1 << DMA_P;
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priv->encoders[priv->num_encoders++] = dsi_encs[i];
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}
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ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, dsi_encs);
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if (ret) {
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dev_err(dev->dev, "failed to initialize DSI: %d\n",
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ret);
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return ret;
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}
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break;
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default:
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dev_err(dev->dev, "Invalid or unsupported interface\n");
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return -EINVAL;
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}
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return 0;
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}
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static int modeset_init(struct mdp4_kms *mdp4_kms)
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{
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struct drm_device *dev = mdp4_kms->dev;
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struct msm_drm_private *priv = dev->dev_private;
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struct drm_plane *plane;
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struct drm_crtc *crtc;
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int i, ret;
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static const enum mdp4_pipe rgb_planes[] = {
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RGB1, RGB2,
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};
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static const enum mdp4_pipe vg_planes[] = {
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VG1, VG2,
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};
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static const enum mdp4_dma mdp4_crtcs[] = {
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DMA_P, DMA_E,
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};
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static const char * const mdp4_crtc_names[] = {
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"DMA_P", "DMA_E",
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};
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static const int mdp4_intfs[] = {
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DRM_MODE_ENCODER_LVDS,
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DRM_MODE_ENCODER_DSI,
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DRM_MODE_ENCODER_TMDS,
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};
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/* construct non-private planes: */
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for (i = 0; i < ARRAY_SIZE(vg_planes); i++) {
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plane = mdp4_plane_init(dev, vg_planes[i], false);
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if (IS_ERR(plane)) {
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dev_err(dev->dev,
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"failed to construct plane for VG%d\n", i + 1);
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ret = PTR_ERR(plane);
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goto fail;
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}
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priv->planes[priv->num_planes++] = plane;
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}
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for (i = 0; i < ARRAY_SIZE(mdp4_crtcs); i++) {
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plane = mdp4_plane_init(dev, rgb_planes[i], true);
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if (IS_ERR(plane)) {
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dev_err(dev->dev,
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"failed to construct plane for RGB%d\n", i + 1);
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ret = PTR_ERR(plane);
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goto fail;
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}
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crtc = mdp4_crtc_init(dev, plane, priv->num_crtcs, i,
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mdp4_crtcs[i]);
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if (IS_ERR(crtc)) {
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dev_err(dev->dev, "failed to construct crtc for %s\n",
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mdp4_crtc_names[i]);
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ret = PTR_ERR(crtc);
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goto fail;
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}
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priv->crtcs[priv->num_crtcs++] = crtc;
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}
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/*
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* we currently set up two relatively fixed paths:
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*
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* LCDC/LVDS path: RGB1 -> DMA_P -> LCDC -> LVDS
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* or
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* DSI path: RGB1 -> DMA_P -> DSI1 -> DSI Panel
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*
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* DTV/HDMI path: RGB2 -> DMA_E -> DTV -> HDMI
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*/
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for (i = 0; i < ARRAY_SIZE(mdp4_intfs); i++) {
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ret = mdp4_modeset_init_intf(mdp4_kms, mdp4_intfs[i]);
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if (ret) {
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dev_err(dev->dev, "failed to initialize intf: %d, %d\n",
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i, ret);
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goto fail;
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}
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}
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return 0;
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|
|
fail:
|
|
return ret;
|
|
}
|
|
|
|
static const char *iommu_ports[] = {
|
|
"mdp_port0_cb0", "mdp_port1_cb0",
|
|
};
|
|
|
|
struct msm_kms *mdp4_kms_init(struct drm_device *dev)
|
|
{
|
|
struct platform_device *pdev = dev->platformdev;
|
|
struct mdp4_platform_config *config = mdp4_get_config(pdev);
|
|
struct mdp4_kms *mdp4_kms;
|
|
struct msm_kms *kms = NULL;
|
|
struct msm_mmu *mmu;
|
|
int ret;
|
|
|
|
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
|
|
if (!mdp4_kms) {
|
|
dev_err(dev->dev, "failed to allocate kms\n");
|
|
ret = -ENOMEM;
|
|
goto fail;
|
|
}
|
|
|
|
mdp_kms_init(&mdp4_kms->base, &kms_funcs);
|
|
|
|
kms = &mdp4_kms->base.base;
|
|
|
|
mdp4_kms->dev = dev;
|
|
|
|
mdp4_kms->mmio = msm_ioremap(pdev, NULL, "MDP4");
|
|
if (IS_ERR(mdp4_kms->mmio)) {
|
|
ret = PTR_ERR(mdp4_kms->mmio);
|
|
goto fail;
|
|
}
|
|
|
|
mdp4_kms->dsi_pll_vdda =
|
|
devm_regulator_get_optional(&pdev->dev, "dsi_pll_vdda");
|
|
if (IS_ERR(mdp4_kms->dsi_pll_vdda))
|
|
mdp4_kms->dsi_pll_vdda = NULL;
|
|
|
|
mdp4_kms->dsi_pll_vddio =
|
|
devm_regulator_get_optional(&pdev->dev, "dsi_pll_vddio");
|
|
if (IS_ERR(mdp4_kms->dsi_pll_vddio))
|
|
mdp4_kms->dsi_pll_vddio = NULL;
|
|
|
|
/* NOTE: driver for this regulator still missing upstream.. use
|
|
* _get_exclusive() and ignore the error if it does not exist
|
|
* (and hope that the bootloader left it on for us)
|
|
*/
|
|
mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
|
|
if (IS_ERR(mdp4_kms->vdd))
|
|
mdp4_kms->vdd = NULL;
|
|
|
|
if (mdp4_kms->vdd) {
|
|
ret = regulator_enable(mdp4_kms->vdd);
|
|
if (ret) {
|
|
dev_err(dev->dev, "failed to enable regulator vdd: %d\n", ret);
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
mdp4_kms->clk = devm_clk_get(&pdev->dev, "core_clk");
|
|
if (IS_ERR(mdp4_kms->clk)) {
|
|
dev_err(dev->dev, "failed to get core_clk\n");
|
|
ret = PTR_ERR(mdp4_kms->clk);
|
|
goto fail;
|
|
}
|
|
|
|
mdp4_kms->pclk = devm_clk_get(&pdev->dev, "iface_clk");
|
|
if (IS_ERR(mdp4_kms->pclk))
|
|
mdp4_kms->pclk = NULL;
|
|
|
|
// XXX if (rev >= MDP_REV_42) { ???
|
|
mdp4_kms->lut_clk = devm_clk_get(&pdev->dev, "lut_clk");
|
|
if (IS_ERR(mdp4_kms->lut_clk)) {
|
|
dev_err(dev->dev, "failed to get lut_clk\n");
|
|
ret = PTR_ERR(mdp4_kms->lut_clk);
|
|
goto fail;
|
|
}
|
|
|
|
mdp4_kms->axi_clk = devm_clk_get(&pdev->dev, "mdp_axi_clk");
|
|
if (IS_ERR(mdp4_kms->axi_clk)) {
|
|
dev_err(dev->dev, "failed to get axi_clk\n");
|
|
ret = PTR_ERR(mdp4_kms->axi_clk);
|
|
goto fail;
|
|
}
|
|
|
|
clk_set_rate(mdp4_kms->clk, config->max_clk);
|
|
clk_set_rate(mdp4_kms->lut_clk, config->max_clk);
|
|
|
|
/* make sure things are off before attaching iommu (bootloader could
|
|
* have left things on, in which case we'll start getting faults if
|
|
* we don't disable):
|
|
*/
|
|
mdp4_enable(mdp4_kms);
|
|
mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
|
|
mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0);
|
|
mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0);
|
|
mdp4_disable(mdp4_kms);
|
|
mdelay(16);
|
|
|
|
if (config->iommu) {
|
|
mmu = msm_iommu_new(&pdev->dev, config->iommu);
|
|
if (IS_ERR(mmu)) {
|
|
ret = PTR_ERR(mmu);
|
|
goto fail;
|
|
}
|
|
ret = mmu->funcs->attach(mmu, iommu_ports,
|
|
ARRAY_SIZE(iommu_ports));
|
|
if (ret)
|
|
goto fail;
|
|
} else {
|
|
dev_info(dev->dev, "no iommu, fallback to phys "
|
|
"contig buffers for scanout\n");
|
|
mmu = NULL;
|
|
}
|
|
|
|
mdp4_kms->id = msm_register_mmu(dev, mmu);
|
|
if (mdp4_kms->id < 0) {
|
|
ret = mdp4_kms->id;
|
|
dev_err(dev->dev, "failed to register mdp4 iommu: %d\n", ret);
|
|
goto fail;
|
|
}
|
|
|
|
ret = modeset_init(mdp4_kms);
|
|
if (ret) {
|
|
dev_err(dev->dev, "modeset_init failed: %d\n", ret);
|
|
goto fail;
|
|
}
|
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC);
|
|
mutex_unlock(&dev->struct_mutex);
|
|
if (IS_ERR(mdp4_kms->blank_cursor_bo)) {
|
|
ret = PTR_ERR(mdp4_kms->blank_cursor_bo);
|
|
dev_err(dev->dev, "could not allocate blank-cursor bo: %d\n", ret);
|
|
mdp4_kms->blank_cursor_bo = NULL;
|
|
goto fail;
|
|
}
|
|
|
|
ret = msm_gem_get_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id,
|
|
&mdp4_kms->blank_cursor_iova);
|
|
if (ret) {
|
|
dev_err(dev->dev, "could not pin blank-cursor bo: %d\n", ret);
|
|
goto fail;
|
|
}
|
|
|
|
dev->mode_config.min_width = 0;
|
|
dev->mode_config.min_height = 0;
|
|
dev->mode_config.max_width = 2048;
|
|
dev->mode_config.max_height = 2048;
|
|
|
|
return kms;
|
|
|
|
fail:
|
|
if (kms)
|
|
mdp4_destroy(kms);
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
|
|
{
|
|
static struct mdp4_platform_config config = {};
|
|
|
|
/* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */
|
|
config.max_clk = 266667000;
|
|
config.iommu = iommu_domain_alloc(&platform_bus_type);
|
|
|
|
return &config;
|
|
}
|