fb4da215ed
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAl0siFoUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vzi9A//S4jRyyZrgUr88Az0GbgMhE4b3yqc uL7om/Sf+443gG6C+aKkZSM/IE9hrbyIKuYq7GGxDkzZ/HkucZo2yIuAHkPgG4ik QQYJ8fJsmMq1bUht87c1ZZwGP0++Deq/Ns2+VNy/WBYqKLulnV0DvEEaJgPs9C5D ppwccGdo6UghiujBTpE4ddUBjFjjURWqT6wSnMRDQ4EGwfUhG0MWwwHKI4hbBuaL N6refuggdYyUUX5FeUOHa6VF6uTnSSAQ75k+40n4nljdayqoumHLskst77o9q5ZI oXjdpwgmuEqYhfp03HEA4Xo/bBxiRj76NuTiEMKvPokxjpanwbLrdV0GhF0OIlM0 rp1NOI1w+vppFrU+rc2gtq+7hYXFmvdhjS29hFLeD91PP36N5d29jW5NVFpm7GCm n4TMGAOsu8RB+bNua6ZbZVcDk2EnPgQeIcM0ZPoBtPK19Fg/rScdEU4u/aFE1Y0Q C+Ks7D1qCvFpHzl/xAg0oo9v/jFsWef3qnQWOzot964Zz4W4NSVvB9Ox6Vbfj6C4 v331LJmlPxG8fxBNA3q28FrTxcG1NW6sgo3WY9VoSp/vc0aqaPKhm7sbraTt5IrI TwqA/WhnAHv90MQCGFcofANyYTkjPkKk2QBFK6b0suoAmVdwVWWELi1WaZ+HdvgQ JP7YpmC2cXcQBPk= =ZGxL -----END PGP SIGNATURE----- Merge tag 'pci-v5.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration changes: - Evaluate PCI Boot Configuration _DSM to learn if firmware wants us to preserve its resource assignments (Benjamin Herrenschmidt) - Simplify resource distribution (Nicholas Johnson) - Decode 32 GT/s link speed (Gustavo Pimentel) Virtualization: - Fix incorrect caching of VF config space size (Alex Williamson) - Fix VF driver probing sysfs knobs (Alex Williamson) Peer-to-peer DMA: - Fix dma_virt_ops check (Logan Gunthorpe) Altera host bridge driver: - Allow building as module (Ley Foon Tan) Armada 8K host bridge driver: - add PHYs support (Miquel Raynal) DesignWare host bridge driver: - Export APIs to support removable loadable module (Vidya Sagar) - Enable Relaxed Ordering erratum workaround only on Tegra20 & Tegra30 (Vidya Sagar) Hyper-V host bridge driver: - Fix use-after-free in eject (Dexuan Cui) Mobiveil host bridge driver: - Clean up and fix many issues, including non-identify mapped windows, 64-bit windows, multi-MSI, class code, INTx clearing (Hou Zhiqiang) Qualcomm host bridge driver: - Use clk bulk API for 2.4.0 controllers (Bjorn Andersson) - Add QCS404 support (Bjorn Andersson) - Assert PERST for at least 100ms (Niklas Cassel) R-Car host bridge driver: - Add r8a774a1 DT support (Biju Das) Tegra host bridge driver: - Add support for Gen2, opportunistic UpdateFC and ACK (PCIe protocol details) AER, GPIO-based PERST# (Manikanta Maddireddy) - Fix many issues, including power-on failure cases, interrupt masking in suspend, UPHY settings, AFI dynamic clock gating, pending DLL transactions (Manikanta Maddireddy) Xilinx host bridge driver: - Fix NWL Multi-MSI programming (Bharat Kumar Gogada) Endpoint support: - Fix 64bit BAR support (Alan Mikhak) - Fix pcitest build issues (Alan Mikhak, Andy Shevchenko) Bug fixes: - Fix NVIDIA GPU multi-function power dependencies (Abhishek Sahu) - Fix NVIDIA GPU HDA enablement issue (Lukas Wunner) - Ignore lockdep for sysfs "remove" (Marek Vasut) Misc: - Convert docs to reST (Changbin Du, Mauro Carvalho Chehab)" * tag 'pci-v5.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (107 commits) PCI: Enable NVIDIA HDA controllers tools: PCI: Fix installation when `make tools/pci_install` PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB PCI: Fix typos and whitespace errors PCI: mobiveil: Fix INTx interrupt clearing in mobiveil_pcie_isr() PCI: mobiveil: Fix infinite-loop in the INTx handling function PCI: mobiveil: Move PCIe PIO enablement out of inbound window routine PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setup PCI: mobiveil: Clear the control fields before updating it PCI: mobiveil: Add configured inbound windows counter PCI: mobiveil: Fix the valid check for inbound and outbound windows PCI: mobiveil: Clean-up program_{ib/ob}_windows() PCI: mobiveil: Remove an unnecessary return value check PCI: mobiveil: Fix error return values PCI: mobiveil: Refactor the MEM/IO outbound window initialization PCI: mobiveil: Make some register updates more readable PCI: mobiveil: Reformat the code for readability dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional ...
214 lines
6.9 KiB
C
214 lines
6.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_RUNTIME_PM_H__
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#define __INTEL_RUNTIME_PM_H__
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#include <linux/types.h>
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#include "display/intel_display.h"
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#include "intel_wakeref.h"
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#include "i915_utils.h"
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struct device;
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struct drm_i915_private;
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struct drm_printer;
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enum i915_drm_suspend_mode {
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I915_DRM_SUSPEND_IDLE,
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I915_DRM_SUSPEND_MEM,
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I915_DRM_SUSPEND_HIBERNATE,
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};
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/*
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* This struct helps tracking the state needed for runtime PM, which puts the
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* device in PCI D3 state. Notice that when this happens, nothing on the
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* graphics device works, even register access, so we don't get interrupts nor
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* anything else.
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*
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* Every piece of our code that needs to actually touch the hardware needs to
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* either call intel_runtime_pm_get or call intel_display_power_get with the
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* appropriate power domain.
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*
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* Our driver uses the autosuspend delay feature, which means we'll only really
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* suspend if we stay with zero refcount for a certain amount of time. The
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* default value is currently very conservative (see intel_runtime_pm_enable), but
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* it can be changed with the standard runtime PM files from sysfs.
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*
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* The irqs_disabled variable becomes true exactly after we disable the IRQs and
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* goes back to false exactly before we reenable the IRQs. We use this variable
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* to check if someone is trying to enable/disable IRQs while they're supposed
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* to be disabled. This shouldn't happen and we'll print some error messages in
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* case it happens.
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*
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* For more, read the Documentation/power/runtime_pm.rst.
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*/
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struct intel_runtime_pm {
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atomic_t wakeref_count;
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struct device *kdev; /* points to i915->drm.pdev->dev */
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bool available;
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bool suspended;
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bool irqs_enabled;
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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/*
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* To aide detection of wakeref leaks and general misuse, we
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* track all wakeref holders. With manual markup (i.e. returning
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* a cookie to each rpm_get caller which they then supply to their
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* paired rpm_put) we can remove corresponding pairs of and keep
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* the array trimmed to active wakerefs.
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*/
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struct intel_runtime_pm_debug {
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spinlock_t lock;
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depot_stack_handle_t last_acquire;
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depot_stack_handle_t last_release;
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depot_stack_handle_t *owners;
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unsigned long count;
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} debug;
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#endif
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};
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#define BITS_PER_WAKEREF \
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BITS_PER_TYPE(struct_member(struct intel_runtime_pm, wakeref_count))
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#define INTEL_RPM_WAKELOCK_SHIFT (BITS_PER_WAKEREF / 2)
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#define INTEL_RPM_WAKELOCK_BIAS (1 << INTEL_RPM_WAKELOCK_SHIFT)
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#define INTEL_RPM_RAW_WAKEREF_MASK (INTEL_RPM_WAKELOCK_BIAS - 1)
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static inline int
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intel_rpm_raw_wakeref_count(int wakeref_count)
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{
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return wakeref_count & INTEL_RPM_RAW_WAKEREF_MASK;
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}
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static inline int
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intel_rpm_wakelock_count(int wakeref_count)
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{
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return wakeref_count >> INTEL_RPM_WAKELOCK_SHIFT;
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}
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static inline void
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assert_rpm_device_not_suspended(struct intel_runtime_pm *rpm)
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{
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WARN_ONCE(rpm->suspended,
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"Device suspended during HW access\n");
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}
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static inline void
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__assert_rpm_raw_wakeref_held(struct intel_runtime_pm *rpm, int wakeref_count)
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{
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assert_rpm_device_not_suspended(rpm);
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WARN_ONCE(!intel_rpm_raw_wakeref_count(wakeref_count),
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"RPM raw-wakeref not held\n");
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}
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static inline void
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__assert_rpm_wakelock_held(struct intel_runtime_pm *rpm, int wakeref_count)
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{
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__assert_rpm_raw_wakeref_held(rpm, wakeref_count);
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WARN_ONCE(!intel_rpm_wakelock_count(wakeref_count),
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"RPM wakelock ref not held during HW access\n");
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}
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static inline void
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assert_rpm_raw_wakeref_held(struct intel_runtime_pm *rpm)
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{
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__assert_rpm_raw_wakeref_held(rpm, atomic_read(&rpm->wakeref_count));
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}
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static inline void
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assert_rpm_wakelock_held(struct intel_runtime_pm *rpm)
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{
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__assert_rpm_wakelock_held(rpm, atomic_read(&rpm->wakeref_count));
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}
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/**
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* disable_rpm_wakeref_asserts - disable the RPM assert checks
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* @rpm: the intel_runtime_pm structure
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*
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* This function disable asserts that check if we hold an RPM wakelock
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* reference, while keeping the device-not-suspended checks still enabled.
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* It's meant to be used only in special circumstances where our rule about
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* the wakelock refcount wrt. the device power state doesn't hold. According
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* to this rule at any point where we access the HW or want to keep the HW in
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* an active state we must hold an RPM wakelock reference acquired via one of
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* the intel_runtime_pm_get() helpers. Currently there are a few special spots
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* where this rule doesn't hold: the IRQ and suspend/resume handlers, the
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* forcewake release timer, and the GPU RPS and hangcheck works. All other
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* users should avoid using this function.
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*
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* Any calls to this function must have a symmetric call to
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* enable_rpm_wakeref_asserts().
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*/
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static inline void
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disable_rpm_wakeref_asserts(struct intel_runtime_pm *rpm)
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{
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atomic_add(INTEL_RPM_WAKELOCK_BIAS + 1,
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&rpm->wakeref_count);
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}
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/**
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* enable_rpm_wakeref_asserts - re-enable the RPM assert checks
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* @rpm: the intel_runtime_pm structure
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*
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* This function re-enables the RPM assert checks after disabling them with
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* disable_rpm_wakeref_asserts. It's meant to be used only in special
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* circumstances otherwise its use should be avoided.
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*
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* Any calls to this function must have a symmetric call to
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* disable_rpm_wakeref_asserts().
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*/
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static inline void
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enable_rpm_wakeref_asserts(struct intel_runtime_pm *rpm)
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{
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atomic_sub(INTEL_RPM_WAKELOCK_BIAS + 1,
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&rpm->wakeref_count);
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}
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void intel_runtime_pm_init_early(struct intel_runtime_pm *rpm);
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void intel_runtime_pm_enable(struct intel_runtime_pm *rpm);
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void intel_runtime_pm_disable(struct intel_runtime_pm *rpm);
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void intel_runtime_pm_cleanup(struct intel_runtime_pm *rpm);
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intel_wakeref_t intel_runtime_pm_get(struct intel_runtime_pm *rpm);
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intel_wakeref_t intel_runtime_pm_get_if_in_use(struct intel_runtime_pm *rpm);
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intel_wakeref_t intel_runtime_pm_get_noresume(struct intel_runtime_pm *rpm);
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intel_wakeref_t intel_runtime_pm_get_raw(struct intel_runtime_pm *rpm);
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#define with_intel_runtime_pm(rpm, wf) \
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for ((wf) = intel_runtime_pm_get(rpm); (wf); \
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intel_runtime_pm_put((rpm), (wf)), (wf) = 0)
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#define with_intel_runtime_pm_if_in_use(rpm, wf) \
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for ((wf) = intel_runtime_pm_get_if_in_use(rpm); (wf); \
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intel_runtime_pm_put((rpm), (wf)), (wf) = 0)
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void intel_runtime_pm_put_unchecked(struct intel_runtime_pm *rpm);
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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void intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
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#else
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static inline void
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intel_runtime_pm_put(struct intel_runtime_pm *rpm, intel_wakeref_t wref)
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{
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intel_runtime_pm_put_unchecked(rpm);
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}
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#endif
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void intel_runtime_pm_put_raw(struct intel_runtime_pm *rpm, intel_wakeref_t wref);
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
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void print_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm,
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struct drm_printer *p);
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#else
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static inline void print_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm,
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struct drm_printer *p)
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{
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}
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#endif
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#endif /* __INTEL_RUNTIME_PM_H__ */
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