Alex Deucher aeefd07e90 drm/radeon: properly set dto for dp on DCE4/5 ... If DCPLL or ext PLL is used, use the disp clk. If PPLL is used, use the dp clock. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2015-03-03 17:28:24 -05:00
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drm	drm/radeon: properly set dto for dp on DCE4/5	2015-03-03 17:28:24 -05:00
host1x	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00
ipu-v3	gpu: ipu-v3: do not divide by zero if the pixel clock is too large	2015-02-23 17:18:59 +01:00
vga	Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2014-10-13 16:23:15 +02:00
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00