Hauke Mehrtens aea7687e77 mtd: spinand: gigadevice: Add QE Bit ... The following GigaDevice chips have the QE BIT in the feature flags, I checked the datasheets, but did not try this. * GD5F1GQ4xExxG * GD5F1GQ4xFxxG * GD5F1GQ4UAYIG * GD5F4GQ4UAYIG The Quad operations like 0xEB mention that the QE bit has to be set. Fixes: c93c613214 ("mtd: spinand: add support for GigaDevice GD5FxGQ4xA") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200820165121.3192-3-hauke@hauke-m.de		2020-09-30 16:44:16 +02:00
..
core.c	mtd: rawnand: Use nanddev_get/set_ecc_requirements() when relevant	2020-09-28 15:59:48 +02:00
gigadevice.c	mtd: spinand: gigadevice: Add QE Bit	2020-09-30 16:44:16 +02:00
Kconfig	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
macronix.c	mtd: spinand: macronix: Add support for MX31UF1GE4BC	2020-09-30 16:44:16 +02:00
Makefile	mtd: spinand: Add initial support for Paragon PN26G0xA	2019-06-27 20:13:07 +02:00
micron.c	mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies	2020-03-12 13:33:36 +01:00
paragon.c	mtd: spinand: rework detect procedure for different READ_ID operation	2020-03-09 14:50:19 +01:00
toshiba.c	mtd: spinand: Use nanddev_get_ecc_conf() when relevant	2020-09-28 15:59:48 +02:00
winbond.c	mtd: spinand: rework detect procedure for different READ_ID operation	2020-03-09 14:50:19 +01:00