Ville Syrjälä ae9ec62bda drm/i915: Fix CHV DSI PLL refclk during state readout ... Use the proper refclock frequency (100MHz) when reading out the current DSI clock on CHV. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458052809-23426-13-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>		2016-04-12 21:12:02 +03:00
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drm	drm/i915: Fix CHV DSI PLL refclk during state readout	2016-04-12 21:12:02 +03:00
host1x	Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux	2016-03-21 13:48:00 -07:00
ipu-v3	gpu: ipu-v3: ipu-dmfc: Rename ipu_dmfc_init_channel to ipu_dmfc_config_wait4eot	2016-03-31 11:24:33 +02:00
vga	vga_switcheroo: Add support for switching only the DDC	2016-02-09 11:21:07 +01:00
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