Joel Stanley b0f8d3077f
dt-bindings: net: Add bindings for LiteETH ...
LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.
The hardware is parametrised by the size and number of the slots in it's
receive and send buffers. These are described as properties, with the
commonly used values set as the default.
Signed-off-by: Joel Stanley <joel@jms.id.au >
Signed-off-by: David S. Miller <davem@davemloft.net >
2021-08-26 12:13:52 +01:00
2021-07-14 09:24:32 -07:00
2021-08-03 13:05:26 +01:00
2021-06-04 11:28:36 -06:00
2021-07-23 17:43:28 -07:00
2021-06-30 12:12:56 -07:00
2021-08-07 01:39:19 +02:00
2021-07-08 11:48:22 -07:00
2021-06-30 19:45:42 +02:00
2021-07-12 13:54:12 -06:00
2021-08-26 12:13:52 +01:00
2021-06-17 13:24:37 -06:00
2021-07-25 09:21:21 +01:00
2021-06-14 15:58:22 -06:00
2021-07-15 06:33:44 -06:00
2021-07-18 23:48:14 +09:00
2021-07-08 12:18:04 -07:00
2021-06-09 14:51:25 +02:00
2021-08-12 06:05:45 -04:00
2021-06-17 04:21:46 -07:00
2021-08-10 22:58:32 +02:00
2021-06-04 11:21:43 -06:00
2021-06-17 13:24:38 -06:00
2021-05-31 10:14:54 +02:00
2021-08-25 13:44:30 +01:00
2021-07-08 12:06:20 -07:00
2021-06-11 19:04:07 +02:00
2021-06-17 13:24:38 -06:00
2021-07-04 12:58:33 -07:00
2021-06-18 21:10:05 -07:00
2021-06-21 15:29:25 -06:00
2021-06-28 16:53:05 -07:00
2021-05-31 22:48:24 -04:00
2021-06-28 16:53:05 -07:00
2021-07-01 08:36:12 +02:00
2021-07-23 08:44:47 -04:00
2021-07-15 06:33:44 -06:00
2021-07-05 14:16:22 -07:00
2021-08-11 19:56:10 -10:00
2021-08-13 03:32:14 -04:00
2021-07-02 12:08:10 -07:00
2021-05-26 09:11:24 +02:00
2021-07-07 11:12:01 -07:00
2021-06-17 13:49:18 -06:00
2021-06-18 11:26:08 -06:00
b0f8d3077f
