For interrupts numbered after those of the interrupt controller, define their numbers based upon the number of interrupts provided by the SoC interrupt controller. This is in preparation for supporting newer Ingenic SoCs which provide more interrupts. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
base.h | ||
clock.h | ||
cpu-feature-overrides.h | ||
dma.h | ||
gpio.h | ||
irq.h | ||
jz4740_fb.h | ||
jz4740_mmc.h | ||
jz4740_nand.h | ||
platform.h | ||
timer.h |