linux/arch/mips/include
James Hogan ad58d4d4a2 KVM: MIPS/T&E: Expose read-only CP0_IntCtl register
Expose the CP0_IntCtl register through the KVM register access API,
which is a required register since MIPS32r2. It is currently read-only
since the VS field isn't implemented due to lack of Config3.VInt or
Config3.VEIC.

It is implemented in trap_emul.c so that a VZ implementation can allow
writes.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
2017-02-03 15:21:33 +00:00
..
asm KVM: MIPS/T&E: Expose read-only CP0_IntCtl register 2017-02-03 15:21:33 +00:00
uapi/asm KVM: MIPS: Claim KVM_CAP_READONLY_MEM support 2017-02-03 15:21:29 +00:00