3fce1c0ba2
P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
89 lines
2.1 KiB
C
89 lines
2.1 KiB
C
/*
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* P2040 RDB Setup
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/phy.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <linux/of_platform.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/ehv_pic.h>
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#include "corenet_ds.h"
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init p2040_rdb_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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#ifdef CONFIG_SMP
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extern struct smp_ops_t smp_85xx_ops;
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#endif
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if (of_flat_dt_is_compatible(root, "fsl,P2040RDB"))
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return 1;
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/* Check if we're running under the Freescale hypervisor */
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if (of_flat_dt_is_compatible(root, "fsl,P2040RDB-hv")) {
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ppc_md.init_IRQ = ehv_pic_init;
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ppc_md.get_irq = ehv_pic_get_irq;
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ppc_md.restart = fsl_hv_restart;
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ppc_md.power_off = fsl_hv_halt;
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ppc_md.halt = fsl_hv_halt;
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#ifdef CONFIG_SMP
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/*
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* Disable the timebase sync operations because we can't write
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* to the timebase registers under the hypervisor.
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*/
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smp_85xx_ops.give_timebase = NULL;
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smp_85xx_ops.take_timebase = NULL;
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#endif
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return 1;
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}
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return 0;
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}
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define_machine(p2040_rdb) {
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.name = "P2040 RDB",
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.probe = p2040_rdb_probe,
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.setup_arch = corenet_ds_setup_arch,
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.init_IRQ = corenet_ds_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_coreint_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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.power_save = e500_idle,
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};
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machine_device_initcall(p2040_rdb, corenet_ds_publish_devices);
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#ifdef CONFIG_SWIOTLB
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machine_arch_initcall(p2040_rdb, swiotlb_setup_bus_notifier);
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#endif
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