forked from Minki/linux
ac7fc233b2
In Berlin SoCs, there are two kinds of cpu reset control registers: the first one's corresponding bits will be self-cleared after some cycles, while the second one's bits won't. Previously the first kind of reset control register is used, this patch uses the second kind one to prepare for the next hotplug commit. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
106 lines
2.5 KiB
C
106 lines
2.5 KiB
C
/*
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* Copyright (C) 2014 Marvell Technology Group Ltd.
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*
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* Antoine Ténart <antoine.tenart@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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/*
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* There are two reset registers, one with self-clearing (SC)
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* reset and one with non-self-clearing reset (NON_SC).
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*/
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#define CPU_RESET_SC 0x00
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#define CPU_RESET_NON_SC 0x20
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#define RESET_VECT 0x00
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#define SW_RESET_ADDR 0x94
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extern u32 boot_inst;
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static void __iomem *cpu_ctrl;
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static inline void berlin_perform_reset_cpu(unsigned int cpu)
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{
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u32 val;
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val = readl(cpu_ctrl + CPU_RESET_NON_SC);
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val &= ~BIT(cpu_logical_map(cpu));
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writel(val, cpu_ctrl + CPU_RESET_NON_SC);
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val |= BIT(cpu_logical_map(cpu));
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writel(val, cpu_ctrl + CPU_RESET_NON_SC);
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}
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static int berlin_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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if (!cpu_ctrl)
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return -EFAULT;
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/*
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* Reset the CPU, making it to execute the instruction in the reset
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* exception vector.
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*/
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berlin_perform_reset_cpu(cpu);
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return 0;
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}
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static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *np;
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void __iomem *scu_base;
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void __iomem *vectors_base;
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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scu_base = of_iomap(np, 0);
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of_node_put(np);
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if (!scu_base)
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return;
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np = of_find_compatible_node(NULL, NULL, "marvell,berlin-cpu-ctrl");
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cpu_ctrl = of_iomap(np, 0);
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of_node_put(np);
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if (!cpu_ctrl)
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goto unmap_scu;
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vectors_base = ioremap(CONFIG_VECTORS_BASE, SZ_32K);
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if (!vectors_base)
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goto unmap_scu;
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scu_enable(scu_base);
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flush_cache_all();
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/*
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* Write the first instruction the CPU will execute after being reset
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* in the reset exception vector.
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*/
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writel(boot_inst, vectors_base + RESET_VECT);
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/*
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* Write the secondary startup address into the SW reset address
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* vector. This is used by boot_inst.
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*/
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writel(virt_to_phys(secondary_startup), vectors_base + SW_RESET_ADDR);
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iounmap(vectors_base);
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unmap_scu:
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iounmap(scu_base);
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}
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static struct smp_operations berlin_smp_ops __initdata = {
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.smp_prepare_cpus = berlin_smp_prepare_cpus,
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.smp_boot_secondary = berlin_boot_secondary,
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};
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CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops);
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