forked from Minki/linux
5518b69b76
Pull networking updates from David Miller:
"Reasonably busy this cycle, but perhaps not as busy as in the 4.12
merge window:
1) Several optimizations for UDP processing under high load from
Paolo Abeni.
2) Support pacing internally in TCP when using the sch_fq packet
scheduler for this is not practical. From Eric Dumazet.
3) Support mutliple filter chains per qdisc, from Jiri Pirko.
4) Move to 1ms TCP timestamp clock, from Eric Dumazet.
5) Add batch dequeueing to vhost_net, from Jason Wang.
6) Flesh out more completely SCTP checksum offload support, from
Davide Caratti.
7) More plumbing of extended netlink ACKs, from David Ahern, Pablo
Neira Ayuso, and Matthias Schiffer.
8) Add devlink support to nfp driver, from Simon Horman.
9) Add RTM_F_FIB_MATCH flag to RTM_GETROUTE queries, from Roopa
Prabhu.
10) Add stack depth tracking to BPF verifier and use this information
in the various eBPF JITs. From Alexei Starovoitov.
11) Support XDP on qed device VFs, from Yuval Mintz.
12) Introduce BPF PROG ID for better introspection of installed BPF
programs. From Martin KaFai Lau.
13) Add bpf_set_hash helper for TC bpf programs, from Daniel Borkmann.
14) For loads, allow narrower accesses in bpf verifier checking, from
Yonghong Song.
15) Support MIPS in the BPF selftests and samples infrastructure, the
MIPS eBPF JIT will be merged in via the MIPS GIT tree. From David
Daney.
16) Support kernel based TLS, from Dave Watson and others.
17) Remove completely DST garbage collection, from Wei Wang.
18) Allow installing TCP MD5 rules using prefixes, from Ivan
Delalande.
19) Add XDP support to Intel i40e driver, from Björn Töpel
20) Add support for TC flower offload in nfp driver, from Simon
Horman, Pieter Jansen van Vuuren, Benjamin LaHaise, Jakub
Kicinski, and Bert van Leeuwen.
21) IPSEC offloading support in mlx5, from Ilan Tayari.
22) Add HW PTP support to macb driver, from Rafal Ozieblo.
23) Networking refcount_t conversions, From Elena Reshetova.
24) Add sock_ops support to BPF, from Lawrence Brako. This is useful
for tuning the TCP sockopt settings of a group of applications,
currently via CGROUPs"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1899 commits)
net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap
dt-bindings: phy: dp83867: provide a workaround for incorrect RX_CTRL pin strap
cxgb4: Support for get_ts_info ethtool method
cxgb4: Add PTP Hardware Clock (PHC) support
cxgb4: time stamping interface for PTP
nfp: default to chained metadata prepend format
nfp: remove legacy MAC address lookup
nfp: improve order of interfaces in breakout mode
net: macb: remove extraneous return when MACB_EXT_DESC is defined
bpf: add missing break in for the TCP_BPF_SNDCWND_CLAMP case
bpf: fix return in load_bpf_file
mpls: fix rtm policy in mpls_getroute
net, ax25: convert ax25_cb.refcount from atomic_t to refcount_t
net, ax25: convert ax25_route.refcount from atomic_t to refcount_t
net, ax25: convert ax25_uid_assoc.refcount from atomic_t to refcount_t
net, sctp: convert sctp_ep_common.refcnt from atomic_t to refcount_t
net, sctp: convert sctp_transport.refcnt from atomic_t to refcount_t
net, sctp: convert sctp_chunk.refcnt from atomic_t to refcount_t
net, sctp: convert sctp_datamsg.refcnt from atomic_t to refcount_t
net, sctp: convert sctp_auth_bytes.refcnt from atomic_t to refcount_t
...
547 lines
13 KiB
Plaintext
547 lines
13 KiB
Plaintext
/*
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* dts file for Hisilicon HiKey Development Board
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*
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* Copyright (C) 2015, Hisilicon Ltd.
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*
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*/
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/dts-v1/;
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#include "hi6220.dtsi"
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#include "hikey-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "HiKey Development Board";
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compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
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aliases {
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serial0 = &uart0; /* On board UART0 */
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serial1 = &uart1; /* BT UART */
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serial2 = &uart2; /* LS Expansion UART0 */
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serial3 = &uart3; /* LS Expansion UART1 */
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};
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chosen {
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stdout-path = "serial3:115200n8";
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};
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/*
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* Reserve below regions from memory node:
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*
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* 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
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* 0x05f0,1000 - 0x05f0,1fff: Reboot reason
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* 0x06df,f000 - 0x06df,ffff: Mailbox message data
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* 0x0740,f000 - 0x0740,ffff: MCU firmware section
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* 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
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* 0x3e00,0000 - 0x3fff,ffff: OP-TEE
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*/
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
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<0x00000000 0x05f00000 0x00000000 0x00001000>,
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<0x00000000 0x05f02000 0x00000000 0x00efd000>,
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<0x00000000 0x06e00000 0x00000000 0x0060f000>,
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<0x00000000 0x07410000 0x00000000 0x1aaf0000>,
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<0x00000000 0x22000000 0x00000000 0x1c000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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ramoops@0x21f00000 {
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compatible = "ramoops";
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reg = <0x0 0x21f00000 0x0 0x00100000>;
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record-size = <0x00020000>;
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console-size = <0x00020000>;
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ftrace-size = <0x00020000>;
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};
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/* global autoconfigured region for contiguous allocations */
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x00000000 0x08000000>;
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linux,cma-default;
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};
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};
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reboot-mode-syscon@5f01000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x0 0x05f01000 0x0 0x00001000>;
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reboot-mode {
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compatible = "syscon-reboot-mode";
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offset = <0x0>;
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mode-normal = <0x77665501>;
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mode-bootloader = <0x77665500>;
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mode-recovery = <0x77665502>;
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};
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};
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reg_sys_5v: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "SYS_5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vdd_3v3: regulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "VDD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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vin-supply = <®_sys_5v>;
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};
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reg_5v_hub: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "5V_HUB";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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gpio = <&gpio0 7 0>;
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regulator-always-on;
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vin-supply = <®_sys_5v>;
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};
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wl1835_pwrseq: wl1835-pwrseq {
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compatible = "mmc-pwrseq-simple";
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/* WLAN_EN GPIO */
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reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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clocks = <&pmic>;
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clock-names = "ext_clock";
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power-off-delay-us = <10>;
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};
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soc {
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spi0: spi@f7106000 {
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status = "ok";
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};
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i2c0: i2c@f7100000 {
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status = "ok";
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};
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i2c1: i2c@f7101000 {
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status = "ok";
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};
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uart1: uart@f7111000 {
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assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
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assigned-clock-rates = <150000000>;
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status = "ok";
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bluetooth {
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compatible = "ti,wl1835-st";
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enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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clocks = <&pmic>;
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clock-names = "ext_clock";
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};
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};
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uart2: uart@f7112000 {
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status = "ok";
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};
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uart3: uart@f7113000 {
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status = "ok";
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};
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/*
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* Legend: proper name = the GPIO line is used as GPIO
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* NC = not connected (not routed from the SoC)
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* "[PER]" = pin is muxed for peripheral (not GPIO)
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* "" = no idea, schematic doesn't say, could be
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* unrouted (not connected to any external pin)
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* LSEC = Low Speed External Connector
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* HSEC = High Speed External Connector
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*
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* Pin assignments taken from LeMaker and CircuitCo Schematics
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* Rev A1.
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*
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* For the lines routed to the external connectors the
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* lines are named after the 96Boards CE Specification 1.0,
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* Appendix "Expansion Connector Signal Description".
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*
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* When the 96Board naming of a line and the schematic name of
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* the same line are in conflict, the 96Board specification
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* takes precedence, which means that the external UART on the
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* LSEC is named UART0 while the schematic and SoC names this
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* UART2. This is only for the informational lines i.e. "[FOO]",
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* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
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* ones actually used for GPIO.
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*/
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gpio0: gpio@f8011000 {
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gpio-line-names = "PWR_HOLD", "DSI_SEL",
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"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
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"PWRON_DET", "5V_HUB_EN";
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};
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gpio1: gpio@f8012000 {
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gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
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"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
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};
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gpio2: gpio@f8013000 {
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gpio-line-names =
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"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
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"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
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"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
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"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
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"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
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"USB_ID_DET", "USB_VBUS_DET",
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"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
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};
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gpio3: gpio@f8014000 {
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gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
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"WLAN_ACTIVE", "NC", "NC";
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};
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gpio4: gpio@f7020000 {
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gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
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"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
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};
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gpio5: gpio@f7021000 {
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gpio-line-names = "NC", "NC",
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"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
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"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
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"[AUX_SSI1]", "NC",
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"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
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"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
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};
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gpio6: gpio@f7022000 {
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gpio-line-names =
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"[SPI0_DIN]", /* Pin 10: SPI0_DI */
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"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
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"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
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"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
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"NC", "NC", "NC",
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"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
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};
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gpio7: gpio@f7023000 {
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gpio-line-names = "NC", "NC", "NC", "NC",
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"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
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"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
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"NC", "NC";
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};
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gpio8: gpio@f7024000 {
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gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
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"", "", "", "", "", "";
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};
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gpio9: gpio@f7025000 {
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gpio-line-names = "",
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"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
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"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
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"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
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};
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gpio10: gpio@f7026000 {
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gpio-line-names = "BOOT_SEL",
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"[ISP_CCLK1]",
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"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
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"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
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"NC", "NC",
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"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
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"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
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};
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gpio11: gpio@f7027000 {
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gpio-line-names =
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"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
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"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
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"", "NC", "NC", "NC", "", "";
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};
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gpio12: gpio@f7028000 {
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gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
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"[BT_PCM_DO]",
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"NC", "NC", "NC", "NC",
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"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
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};
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gpio13: gpio@f7029000 {
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gpio-line-names = "[UART0_RX]", "[UART0_TX]",
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"[BT_UART1_CTS]", "[BT_UART1_RTS]",
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"[BT_UART1_RX]", "[BT_UART1_TX]",
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"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
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"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
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};
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gpio14: gpio@f702a000 {
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gpio-line-names =
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"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
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"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
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"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
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"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
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"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
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"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
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"[I2C2_SCL]", "[I2C2_SDA]";
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};
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gpio15: gpio@f702b000 {
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gpio-line-names = "", "", "", "", "", "", "NC", "";
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};
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/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
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dwmmc_0: dwmmc0@f723d000 {
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cap-mmc-highspeed;
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non-removable;
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bus-width = <0x8>;
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vmmc-supply = <&ldo19>;
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};
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dwmmc_1: dwmmc1@f723e000 {
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card-detect-delay = <200>;
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cap-sd-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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vqmmc-supply = <&ldo7>;
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vmmc-supply = <&ldo10>;
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bus-width = <0x4>;
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disable-wp;
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cd-gpios = <&gpio1 0 1>;
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};
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dwmmc_2: dwmmc2@f723f000 {
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bus-width = <0x4>;
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non-removable;
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vmmc-supply = <®_vdd_3v3>;
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mmc-pwrseq = <&wl1835_pwrseq>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1835";
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reg = <2>; /* sdio func num */
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/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
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interrupt-parent = <&gpio1>;
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interrupts = <3 IRQ_TYPE_EDGE_RISING>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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user_led4 {
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label = "user_led4";
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gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
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linux,default-trigger = "heartbeat";
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};
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user_led3 {
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label = "user_led3";
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gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
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linux,default-trigger = "mmc0";
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};
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user_led2 {
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label = "user_led2";
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gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
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linux,default-trigger = "mmc1";
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};
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user_led1 {
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label = "user_led1";
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gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
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linux,default-trigger = "cpu0";
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};
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wlan_active_led {
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label = "wifi_active";
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gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
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linux,default-trigger = "phy0tx";
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default-state = "off";
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};
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bt_active_led {
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label = "bt_active";
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gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
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linux,default-trigger = "hci0rx";
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default-state = "off";
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};
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};
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pmic: pmic@f8000000 {
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compatible = "hisilicon,hi655x-pmic";
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reg = <0x0 0xf8000000 0x0 0x1000>;
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#clock-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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regulators {
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ldo2: LDO2 {
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regulator-name = "LDO2_2V8";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <3200000>;
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regulator-enable-ramp-delay = <120>;
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};
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ldo7: LDO7 {
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regulator-name = "LDO7_SDIO";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <120>;
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};
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ldo10: LDO10 {
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regulator-name = "LDO10_2V85";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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regulator-enable-ramp-delay = <360>;
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};
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ldo13: LDO13 {
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regulator-name = "LDO13_1V8";
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <1950000>;
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regulator-enable-ramp-delay = <120>;
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};
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ldo14: LDO14 {
|
|
regulator-name = "LDO14_2V8";
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <3200000>;
|
|
regulator-enable-ramp-delay = <120>;
|
|
};
|
|
|
|
ldo15: LDO15 {
|
|
regulator-name = "LDO15_1V8";
|
|
regulator-min-microvolt = <1600000>;
|
|
regulator-max-microvolt = <1950000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-enable-ramp-delay = <120>;
|
|
};
|
|
|
|
ldo17: LDO17 {
|
|
regulator-name = "LDO17_2V5";
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <3200000>;
|
|
regulator-enable-ramp-delay = <120>;
|
|
};
|
|
|
|
ldo19: LDO19 {
|
|
regulator-name = "LDO19_3V0";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-enable-ramp-delay = <360>;
|
|
};
|
|
|
|
ldo21: LDO21 {
|
|
regulator-name = "LDO21_1V8";
|
|
regulator-min-microvolt = <1650000>;
|
|
regulator-max-microvolt = <2000000>;
|
|
regulator-always-on;
|
|
regulator-enable-ramp-delay = <120>;
|
|
};
|
|
|
|
ldo22: LDO22 {
|
|
regulator-name = "LDO22_1V2";
|
|
regulator-min-microvolt = <900000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-enable-ramp-delay = <120>;
|
|
};
|
|
};
|
|
};
|
|
|
|
firmware {
|
|
optee {
|
|
compatible = "linaro,optee-tz";
|
|
method = "smc";
|
|
};
|
|
};
|
|
|
|
sound_card {
|
|
compatible = "audio-graph-card";
|
|
dais = <&i2s0_port0>;
|
|
};
|
|
};
|
|
|
|
&uart2 {
|
|
label = "LS-UART0";
|
|
};
|
|
&uart3 {
|
|
label = "LS-UART1";
|
|
};
|
|
|
|
&ade {
|
|
status = "ok";
|
|
};
|
|
|
|
&dsi {
|
|
status = "ok";
|
|
|
|
ports {
|
|
/* 1 for output port */
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
dsi_out0: endpoint@0 {
|
|
remote-endpoint = <&adv7533_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "ok";
|
|
|
|
adv7533: adv7533@39 {
|
|
compatible = "adi,adv7533";
|
|
reg = <0x39>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <1 2>;
|
|
pd-gpio = <&gpio0 4 0>;
|
|
adi,dsi-lanes = <4>;
|
|
#sound-dai-cells = <0>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@0 {
|
|
adv7533_in: endpoint {
|
|
remote-endpoint = <&dsi_out0>;
|
|
};
|
|
};
|
|
port@2 {
|
|
reg = <2>;
|
|
codec_endpoint: endpoint {
|
|
remote-endpoint = <&i2s0_cpu_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2s0 {
|
|
|
|
ports {
|
|
i2s0_port0: port@0 {
|
|
i2s0_cpu_endpoint: endpoint {
|
|
remote-endpoint = <&codec_endpoint>;
|
|
dai-format = "i2s";
|
|
};
|
|
};
|
|
};
|
|
};
|