forked from Minki/linux
19d857c903
stmmac_config_sub_second_increment set the sub second increment to 20ns. Driver is configured to use the fine adjustment method where the sub second register is incremented when the acculumator incremented by the addend register wraps overflows. This accumulator is update on every ptp clk cycle. If a ptp clk with a period of greater than 20ns was used the sub second register would not get updated correctly. Instead set the sub sec increment to twice the period of the ptp clk. This result in the addend register being set mid range and overflow the accumlator every 2 clock cycles. Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: David S. Miller <davem@davemloft.net>
152 lines
3.9 KiB
C
152 lines
3.9 KiB
C
/*******************************************************************************
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Copyright (C) 2013 Vayavya Labs Pvt Ltd
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This implements all the API for managing HW timestamp & PTP.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include "common.h"
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#include "stmmac_ptp.h"
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static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data)
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{
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writel(data, ioaddr + PTP_TCR);
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}
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static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
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u32 ptp_clock)
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{
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u32 value = readl(ioaddr + PTP_TCR);
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unsigned long data;
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/* Convert the ptp_clock to nano second
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* formula = (2/ptp_clock) * 1000000000
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* where, ptp_clock = 50MHz.
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*/
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data = (2000000000ULL / ptp_clock);
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/* 0.465ns accuracy */
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if (!(value & PTP_TCR_TSCTRLSSR))
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data = (data * 1000) / 465;
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writel(data, ioaddr + PTP_SSIR);
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return data;
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}
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static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
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{
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int limit;
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u32 value;
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writel(sec, ioaddr + PTP_STSUR);
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writel(nsec, ioaddr + PTP_STNSUR);
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/* issue command to initialize the system time value */
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value = readl(ioaddr + PTP_TCR);
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value |= PTP_TCR_TSINIT;
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writel(value, ioaddr + PTP_TCR);
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/* wait for present system time initialize to complete */
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limit = 10;
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while (limit--) {
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if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSINIT))
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break;
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mdelay(10);
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}
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if (limit < 0)
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return -EBUSY;
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return 0;
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}
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static int stmmac_config_addend(void __iomem *ioaddr, u32 addend)
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{
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u32 value;
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int limit;
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writel(addend, ioaddr + PTP_TAR);
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/* issue command to update the addend value */
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value = readl(ioaddr + PTP_TCR);
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value |= PTP_TCR_TSADDREG;
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writel(value, ioaddr + PTP_TCR);
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/* wait for present addend update to complete */
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limit = 10;
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while (limit--) {
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if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSADDREG))
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break;
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mdelay(10);
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}
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if (limit < 0)
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return -EBUSY;
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return 0;
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}
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static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,
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int add_sub)
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{
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u32 value;
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int limit;
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writel(sec, ioaddr + PTP_STSUR);
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writel(((add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec),
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ioaddr + PTP_STNSUR);
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/* issue command to initialize the system time value */
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value = readl(ioaddr + PTP_TCR);
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value |= PTP_TCR_TSUPDT;
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writel(value, ioaddr + PTP_TCR);
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/* wait for present system time adjust/update to complete */
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limit = 10;
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while (limit--) {
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if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSUPDT))
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break;
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mdelay(10);
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}
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if (limit < 0)
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return -EBUSY;
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return 0;
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}
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static u64 stmmac_get_systime(void __iomem *ioaddr)
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{
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u64 ns;
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ns = readl(ioaddr + PTP_STNSR);
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/* convert sec time value to nanosecond */
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ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
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return ns;
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}
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const struct stmmac_hwtimestamp stmmac_ptp = {
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.config_hw_tstamping = stmmac_config_hw_tstamping,
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.init_systime = stmmac_init_systime,
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.config_sub_second_increment = stmmac_config_sub_second_increment,
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.config_addend = stmmac_config_addend,
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.adjust_systime = stmmac_adjust_systime,
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.get_systime = stmmac_get_systime,
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};
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