8f48ba303d
sysfs_emit and sysfs_emit_at requrie a page boundary aligned buf address. Make them happy! v2: use an inline function. Warning Log: [ 492.545174] invalid sysfs_emit_at: buf:00000000f19bdfde at:0 [ 492.546416] WARNING: CPU: 7 PID: 1304 at fs/sysfs/file.c:765 sysfs_emit_at+0x4a/0xa0 [ 492.654805] Call Trace: [ 492.655353] ? smu_cmn_get_metrics_table+0x40/0x50 [amdgpu] [ 492.656780] vangogh_print_clk_levels+0x369/0x410 [amdgpu] [ 492.658245] vangogh_common_print_clk_levels+0x77/0x80 [amdgpu] [ 492.659733] ? preempt_schedule_common+0x18/0x30 [ 492.660713] smu_print_ppclk_levels+0x65/0x90 [amdgpu] [ 492.662107] amdgpu_get_pp_od_clk_voltage+0x13d/0x190 [amdgpu] [ 492.663620] dev_attr_show+0x1d/0x40 Signed-off-by: Lang Yu <lang.yu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
128 lines
4.0 KiB
C
128 lines
4.0 KiB
C
/*
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* Copyright 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __SMU_CMN_H__
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#define __SMU_CMN_H__
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#include "amdgpu_smu.h"
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#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4)
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int smu_cmn_send_msg_without_waiting(struct smu_context *smu,
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uint16_t msg_index,
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uint32_t param);
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int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
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enum smu_message_type msg,
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uint32_t param,
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uint32_t *read_arg);
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int smu_cmn_send_smc_msg(struct smu_context *smu,
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enum smu_message_type msg,
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uint32_t *read_arg);
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int smu_cmn_wait_for_response(struct smu_context *smu);
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int smu_cmn_to_asic_specific_index(struct smu_context *smu,
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enum smu_cmn2asic_mapping_type type,
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uint32_t index);
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int smu_cmn_feature_is_supported(struct smu_context *smu,
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enum smu_feature_mask mask);
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int smu_cmn_feature_is_enabled(struct smu_context *smu,
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enum smu_feature_mask mask);
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bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
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enum smu_clk_type clk_type);
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int smu_cmn_get_enabled_mask(struct smu_context *smu,
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uint32_t *feature_mask,
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uint32_t num);
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int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
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uint32_t *feature_mask,
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uint32_t num);
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uint64_t smu_cmn_get_indep_throttler_status(
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const unsigned long dep_status,
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const uint8_t *throttler_map);
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int smu_cmn_feature_update_enable_state(struct smu_context *smu,
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uint64_t feature_mask,
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bool enabled);
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int smu_cmn_feature_set_enabled(struct smu_context *smu,
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enum smu_feature_mask mask,
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bool enable);
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size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
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char *buf);
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int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
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uint64_t new_mask);
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int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
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bool no_hw_disablement,
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enum smu_feature_mask mask);
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int smu_cmn_get_smc_version(struct smu_context *smu,
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uint32_t *if_version,
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uint32_t *smu_version);
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int smu_cmn_update_table(struct smu_context *smu,
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enum smu_table_id table_index,
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int argument,
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void *table_data,
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bool drv2smu);
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int smu_cmn_write_watermarks_table(struct smu_context *smu);
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int smu_cmn_write_pptable(struct smu_context *smu);
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int smu_cmn_get_metrics_table_locked(struct smu_context *smu,
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void *metrics_table,
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bool bypass_cache);
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int smu_cmn_get_metrics_table(struct smu_context *smu,
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void *metrics_table,
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bool bypass_cache);
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void smu_cmn_init_soft_gpu_metrics(void *table, uint8_t frev, uint8_t crev);
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int smu_cmn_set_mp1_state(struct smu_context *smu,
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enum pp_mp1_state mp1_state);
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/*
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* Helper function to make sysfs_emit_at() happy. Align buf to
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* the current page boundary and record the offset.
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*/
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static inline void smu_cmn_get_sysfs_buf(char **buf, int *offset)
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{
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if (!*buf || !offset)
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return;
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*offset = offset_in_page(*buf);
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*buf -= *offset;
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}
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#endif
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#endif
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