forked from Minki/linux
20d330645c
On some MIPS systems, a subset of devices may have DMA coherent with CPU caches. For example in systems including a MIPS I/O Coherence Unit (IOCU), some devices may be connected to that IOCU whilst others are not. Prior to this patch, we have a plat_device_is_coherent() function but no implementation which does anything besides return a global true or false, optionally chosen at runtime. For devices such as those described above this is insufficient. Fix this by tracking DMA coherence on a per-device basis with a dma_coherent field in struct dev_archdata. Setting this from arch_setup_dma_ops() takes care of devices which set the dma-coherent property via device tree, and any PCI devices beneath a bridge described in DT, automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14349/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
33 lines
813 B
C
33 lines
813 B
C
/*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
* for more details.
|
|
*
|
|
* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
|
|
*
|
|
*/
|
|
#ifndef __ASM_DMA_COHERENCE_H
|
|
#define __ASM_DMA_COHERENCE_H
|
|
|
|
enum coherent_io_user_state {
|
|
IO_COHERENCE_DEFAULT,
|
|
IO_COHERENCE_ENABLED,
|
|
IO_COHERENCE_DISABLED,
|
|
};
|
|
|
|
#if defined(CONFIG_DMA_PERDEV_COHERENT)
|
|
/* Don't provide (hw_)coherentio to avoid misuse */
|
|
#elif defined(CONFIG_DMA_MAYBE_COHERENT)
|
|
extern enum coherent_io_user_state coherentio;
|
|
extern int hw_coherentio;
|
|
#else
|
|
#ifdef CONFIG_DMA_COHERENT
|
|
#define coherentio IO_COHERENCE_ENABLED
|
|
#else
|
|
#define coherentio IO_COHERENCE_DISABLED
|
|
#endif
|
|
#define hw_coherentio 0
|
|
#endif /* CONFIG_DMA_MAYBE_COHERENT */
|
|
|
|
#endif
|