forked from Minki/linux
2435854e2a
The logic implemented by these routines now lives in the da8xx-ohci driver. Remove dead code. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
409 lines
9.7 KiB
C
409 lines
9.7 KiB
C
/*
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* Hawkboard.org based on TI's OMAP-L138 Platform
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*
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* Initial code: Syed Mohammed Khasim
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*
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* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of
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* any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/interrupt.h>
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#include <linux/gpio.h>
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#include <linux/gpio/machine.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/platform_data/gpio-davinci.h>
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#include <linux/platform_data/mtd-davinci.h>
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#include <linux/platform_data/mtd-davinci-aemif.h>
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#include <linux/platform_data/ti-aemif.h>
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#include <linux/regulator/machine.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include "cp_intc.h"
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#include <mach/da8xx.h>
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#include <mach/mux.h>
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#define HAWKBOARD_PHY_ID "davinci_mdio-0:07"
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#define DA850_USB1_VBUS_PIN GPIO_TO_PIN(2, 4)
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#define DA850_USB1_OC_PIN GPIO_TO_PIN(6, 13)
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static short omapl138_hawk_mii_pins[] __initdata = {
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DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
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DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
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DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
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DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
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DA850_MDIO_D,
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-1
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};
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static __init void omapl138_hawk_config_emac(void)
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{
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void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
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int ret;
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u32 val;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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val = __raw_readl(cfgchip3);
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val &= ~BIT(8);
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ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins);
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if (ret) {
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pr_warn("%s: CPGMAC/MII mux setup failed: %d\n", __func__, ret);
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return;
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}
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/* configure the CFGCHIP3 register for MII */
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__raw_writel(val, cfgchip3);
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pr_info("EMAC: MII PHY configured\n");
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soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID;
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ret = da8xx_register_emac();
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if (ret)
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pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
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}
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/*
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* The following EDMA channels/slots are not being used by drivers (for
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* example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard,
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* hence they are being reserved for codecs on the DSP side.
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*/
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static const s16 da850_dma0_rsv_chans[][2] = {
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/* (offset, number) */
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{ 8, 6},
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{24, 4},
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{30, 2},
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{-1, -1}
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};
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static const s16 da850_dma0_rsv_slots[][2] = {
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/* (offset, number) */
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{ 8, 6},
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{24, 4},
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{30, 50},
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{-1, -1}
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};
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static const s16 da850_dma1_rsv_chans[][2] = {
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/* (offset, number) */
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{ 0, 28},
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{30, 2},
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{-1, -1}
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};
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static const s16 da850_dma1_rsv_slots[][2] = {
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/* (offset, number) */
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{ 0, 28},
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{30, 90},
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{-1, -1}
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};
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static struct edma_rsv_info da850_edma_cc0_rsv = {
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.rsv_chans = da850_dma0_rsv_chans,
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.rsv_slots = da850_dma0_rsv_slots,
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};
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static struct edma_rsv_info da850_edma_cc1_rsv = {
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.rsv_chans = da850_dma1_rsv_chans,
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.rsv_slots = da850_dma1_rsv_slots,
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};
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static struct edma_rsv_info *da850_edma_rsv[2] = {
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&da850_edma_cc0_rsv,
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&da850_edma_cc1_rsv,
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};
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static const short hawk_mmcsd0_pins[] = {
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DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
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DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
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DA850_GPIO3_12, DA850_GPIO3_13,
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-1
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};
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#define DA850_HAWK_MMCSD_CD_PIN GPIO_TO_PIN(3, 12)
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#define DA850_HAWK_MMCSD_WP_PIN GPIO_TO_PIN(3, 13)
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static struct gpiod_lookup_table mmc_gpios_table = {
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.dev_id = "da830-mmc.0",
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.table = {
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GPIO_LOOKUP("davinci_gpio.0", DA850_HAWK_MMCSD_CD_PIN, "cd",
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GPIO_ACTIVE_LOW),
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GPIO_LOOKUP("davinci_gpio.0", DA850_HAWK_MMCSD_WP_PIN, "wp",
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GPIO_ACTIVE_LOW),
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},
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};
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static struct davinci_mmc_config da850_mmc_config = {
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.wires = 4,
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.max_freq = 50000000,
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.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
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};
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static __init void omapl138_hawk_mmc_init(void)
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{
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int ret;
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ret = davinci_cfg_reg_list(hawk_mmcsd0_pins);
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if (ret) {
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pr_warn("%s: MMC/SD0 mux setup failed: %d\n", __func__, ret);
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return;
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}
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gpiod_add_lookup_table(&mmc_gpios_table);
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ret = da8xx_register_mmcsd0(&da850_mmc_config);
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if (ret) {
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pr_warn("%s: MMC/SD0 registration failed: %d\n", __func__, ret);
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goto mmc_setup_mmcsd_fail;
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}
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return;
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mmc_setup_mmcsd_fail:
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gpiod_remove_lookup_table(&mmc_gpios_table);
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}
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static struct mtd_partition omapl138_hawk_nandflash_partition[] = {
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{
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.name = "u-boot env",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "u-boot",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_512K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "free space",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = {
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.wsetup = 24,
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.wstrobe = 21,
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.whold = 14,
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.rsetup = 19,
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.rstrobe = 50,
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.rhold = 0,
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.ta = 20,
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};
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static struct davinci_nand_pdata omapl138_hawk_nandflash_data = {
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.core_chipsel = 1,
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.parts = omapl138_hawk_nandflash_partition,
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.nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.ecc_bits = 4,
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.bbt_options = NAND_BBT_USE_FLASH,
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.options = NAND_BUSWIDTH_16,
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.timing = &omapl138_hawk_nandflash_timing,
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.mask_chipsel = 0,
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.mask_ale = 0,
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.mask_cle = 0,
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};
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static struct resource omapl138_hawk_nandflash_resource[] = {
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{
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.start = DA8XX_AEMIF_CS3_BASE,
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.end = DA8XX_AEMIF_CS3_BASE + SZ_32M,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource omapl138_hawk_aemif_resource[] = {
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{
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = {
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{
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.cs = 3,
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}
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};
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static struct platform_device omapl138_hawk_aemif_devices[] = {
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{
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.name = "davinci_nand",
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.id = -1,
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.dev = {
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.platform_data = &omapl138_hawk_nandflash_data,
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},
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.resource = omapl138_hawk_nandflash_resource,
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.num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource),
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}
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};
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static struct aemif_platform_data omapl138_hawk_aemif_pdata = {
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.cs_offset = 2,
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.abus_data = omapl138_hawk_aemif_abus_data,
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.num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data),
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.sub_devices = omapl138_hawk_aemif_devices,
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.num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices),
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};
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static struct platform_device omapl138_hawk_aemif_device = {
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.name = "ti-aemif",
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.id = -1,
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.dev = {
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.platform_data = &omapl138_hawk_aemif_pdata,
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},
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.resource = omapl138_hawk_aemif_resource,
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.num_resources = ARRAY_SIZE(omapl138_hawk_aemif_resource),
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};
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static const short omapl138_hawk_nand_pins[] = {
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DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3,
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DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
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DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
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DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
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DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
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DA850_EMA_A_1, DA850_EMA_A_2,
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-1
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};
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static int omapl138_hawk_register_aemif(void)
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{
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int ret;
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ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins);
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if (ret)
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pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret);
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return platform_device_register(&omapl138_hawk_aemif_device);
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}
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static const short da850_hawk_usb11_pins[] = {
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DA850_GPIO2_4, DA850_GPIO6_13,
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-1
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};
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static struct gpiod_lookup_table hawk_usb_gpio_lookup = {
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.dev_id = "ohci-da8xx",
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.table = {
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GPIO_LOOKUP("davinci_gpio", DA850_USB1_VBUS_PIN, "vbus", 0),
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GPIO_LOOKUP("davinci_gpio", DA850_USB1_OC_PIN, "oc", 0),
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},
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};
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static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
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/* TPS2087 switch @ 5V */
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.potpgt = (3 + 1) / 2, /* 3 ms max */
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};
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static __init void omapl138_hawk_usb_init(void)
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{
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int ret;
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ret = davinci_cfg_reg_list(da850_hawk_usb11_pins);
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if (ret) {
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pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
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return;
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}
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ret = da8xx_register_usb_phy_clocks();
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if (ret)
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pr_warn("%s: USB PHY CLK registration failed: %d\n",
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__func__, ret);
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ret = da8xx_register_usb_phy();
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if (ret)
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pr_warn("%s: USB PHY registration failed: %d\n",
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__func__, ret);
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gpiod_add_lookup_table(&hawk_usb_gpio_lookup);
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ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
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if (ret)
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pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
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return;
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}
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static __init void omapl138_hawk_init(void)
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{
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int ret;
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da850_register_clocks();
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ret = da850_register_gpio();
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if (ret)
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pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
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davinci_serial_init(da8xx_serial_device);
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omapl138_hawk_config_emac();
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ret = da850_register_edma(da850_edma_rsv);
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if (ret)
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pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
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omapl138_hawk_mmc_init();
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omapl138_hawk_usb_init();
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ret = omapl138_hawk_register_aemif();
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if (ret)
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pr_warn("%s: aemif registration failed: %d\n", __func__, ret);
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ret = da8xx_register_watchdog();
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if (ret)
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pr_warn("%s: watchdog registration failed: %d\n",
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__func__, ret);
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ret = da8xx_register_rproc();
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if (ret)
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pr_warn("%s: dsp/rproc registration failed: %d\n",
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__func__, ret);
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regulator_has_full_constraints();
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}
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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static int __init omapl138_hawk_console_init(void)
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{
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if (!machine_is_omapl138_hawkboard())
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return 0;
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return add_preferred_console("ttyS", 2, "115200");
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}
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console_initcall(omapl138_hawk_console_init);
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#endif
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static void __init omapl138_hawk_map_io(void)
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{
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da850_init();
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}
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MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
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.atag_offset = 0x100,
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.map_io = omapl138_hawk_map_io,
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.init_irq = cp_intc_init,
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.init_time = da850_init_time,
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.init_machine = omapl138_hawk_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.reserve = da8xx_rproc_reserve_cma,
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MACHINE_END
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