[why] DCN31 has this in zstate save/restore sequence. need for non_zstate supported ASIC [how] add this PANEL_PWRSEQ_REF_DIV2 to existing panel_cntl_hw_init structure. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| abm.h | ||
| audio.h | ||
| aux_engine.h | ||
| clk_mgr_internal.h | ||
| clk_mgr.h | ||
| dccg.h | ||
| dchubbub.h | ||
| dmcu.h | ||
| dpp.h | ||
| dsc.h | ||
| dwb.h | ||
| gpio.h | ||
| hubp.h | ||
| hw_shared.h | ||
| ipp.h | ||
| link_encoder.h | ||
| mcif_wb.h | ||
| mem_input.h | ||
| mpc.h | ||
| opp.h | ||
| panel_cntl.h | ||
| stream_encoder.h | ||
| timing_generator.h | ||
| transform.h | ||
| vmid.h | ||