ec5b0af7da
Add regulators to pcie node from schematics. Signed-off-by: Markus Reichl <m.reichl@fivetechno.de> Link: https://lore.kernel.org/r/8fa0c3da-b64d-f47f-a9eb-b3456a3fd073@fivetechno.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
75 lines
1.7 KiB
Plaintext
75 lines
1.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
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* Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de>
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*/
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/dts-v1/;
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#include "rk3399-roc-pc.dtsi"
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/ {
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model = "Firefly ROC-RK3399-PC Mezzanine Board";
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compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
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vcc3v3_ngff: vcc3v3-ngff {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_ngff";
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enable-active-high;
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gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_ngff_en>;
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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vcc3v3_pcie: vcc3v3-pcie {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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enable-active-high;
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gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_pcie_en>;
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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};
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&pcie_phy {
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status = "okay";
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};
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&pcie0 {
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ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
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num-lanes = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_perst>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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vpcie1v8-supply = <&vcc1v8_pmu>;
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vpcie0v9-supply = <&vcca_0v9>;
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status = "okay";
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};
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&pinctrl {
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ngff {
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vcc3v3_ngff_en: vcc3v3-ngff-en {
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rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pcie {
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vcc3v3_pcie_en: vcc3v3-pcie-en {
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rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie_perst: pcie-perst {
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rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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