forked from Minki/linux
a606f4325d
The TX DMA engine issues upstream read requests when there is room in the TX FIFO for the completion. However, the fetches for the rest of the packet might be delayed by any back pressure. Since a flush must wait for an EOP, the entire flush may be delayed by back pressure. Mitigate this by disabling flow control before the flushes are started. Since PF and VF flushes run in parallel introduce fc_disable, a reference count of the number of flushes outstanding. The same principle could be applied to Falcon, but that would bring with it its own testing. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
131 lines
3.4 KiB
C
131 lines
3.4 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2009-2010 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include "net_driver.h"
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#include "efx.h"
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#include "mcdi.h"
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#include "mcdi_pcol.h"
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static int efx_mcdi_set_mac(struct efx_nic *efx)
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{
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u32 reject, fcntl;
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u8 cmdbytes[MC_CMD_SET_MAC_IN_LEN];
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memcpy(cmdbytes + MC_CMD_SET_MAC_IN_ADDR_OFST,
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efx->net_dev->dev_addr, ETH_ALEN);
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MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_MTU,
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EFX_MAX_FRAME_LEN(efx->net_dev->mtu));
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MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_DRAIN, 0);
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/* The MCDI command provides for controlling accept/reject
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* of broadcast packets too, but the driver doesn't currently
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* expose this. */
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reject = (efx->promiscuous) ? 0 :
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(1 << MC_CMD_SET_MAC_IN_REJECT_UNCST_LBN);
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MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_REJECT, reject);
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switch (efx->wanted_fc) {
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case EFX_FC_RX | EFX_FC_TX:
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fcntl = MC_CMD_FCNTL_BIDIR;
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break;
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case EFX_FC_RX:
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fcntl = MC_CMD_FCNTL_RESPOND;
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break;
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default:
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fcntl = MC_CMD_FCNTL_OFF;
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break;
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}
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if (efx->wanted_fc & EFX_FC_AUTO)
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fcntl = MC_CMD_FCNTL_AUTO;
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if (efx->fc_disable)
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fcntl = MC_CMD_FCNTL_OFF;
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MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_FCNTL, fcntl);
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return efx_mcdi_rpc(efx, MC_CMD_SET_MAC, cmdbytes, sizeof(cmdbytes),
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NULL, 0, NULL);
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}
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bool efx_mcdi_mac_check_fault(struct efx_nic *efx)
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{
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u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
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size_t outlength;
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int rc;
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BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
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rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
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outbuf, sizeof(outbuf), &outlength);
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if (rc) {
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netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
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__func__, rc);
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return true;
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}
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return MCDI_DWORD(outbuf, GET_LINK_OUT_MAC_FAULT) != 0;
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}
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int efx_mcdi_mac_stats(struct efx_nic *efx, dma_addr_t dma_addr,
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u32 dma_len, int enable, int clear)
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{
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u8 inbuf[MC_CMD_MAC_STATS_IN_LEN];
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int rc;
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efx_dword_t *cmd_ptr;
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int period = enable ? 1000 : 0;
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u32 addr_hi;
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u32 addr_lo;
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BUILD_BUG_ON(MC_CMD_MAC_STATS_OUT_DMA_LEN != 0);
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addr_lo = ((u64)dma_addr) >> 0;
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addr_hi = ((u64)dma_addr) >> 32;
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MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_ADDR_LO, addr_lo);
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MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_ADDR_HI, addr_hi);
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cmd_ptr = (efx_dword_t *)MCDI_PTR(inbuf, MAC_STATS_IN_CMD);
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EFX_POPULATE_DWORD_7(*cmd_ptr,
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MC_CMD_MAC_STATS_IN_DMA, !!enable,
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MC_CMD_MAC_STATS_IN_CLEAR, clear,
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MC_CMD_MAC_STATS_IN_PERIODIC_CHANGE, 1,
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MC_CMD_MAC_STATS_IN_PERIODIC_ENABLE, !!enable,
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MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR, 0,
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MC_CMD_MAC_STATS_IN_PERIODIC_NOEVENT, 1,
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MC_CMD_MAC_STATS_IN_PERIOD_MS, period);
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MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_LEN, dma_len);
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rc = efx_mcdi_rpc(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
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NULL, 0, NULL);
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if (rc)
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goto fail;
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return 0;
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fail:
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netif_err(efx, hw, efx->net_dev, "%s: %s failed rc=%d\n",
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__func__, enable ? "enable" : "disable", rc);
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return rc;
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}
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int efx_mcdi_mac_reconfigure(struct efx_nic *efx)
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{
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int rc;
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WARN_ON(!mutex_is_locked(&efx->mac_lock));
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rc = efx_mcdi_set_mac(efx);
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if (rc != 0)
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return rc;
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return efx_mcdi_rpc(efx, MC_CMD_SET_MCAST_HASH,
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efx->multicast_hash.byte,
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sizeof(efx->multicast_hash),
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NULL, 0, NULL);
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}
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