a712b307cf
dpu_crtc_atomic_flush() was directly poking it's attached planes in a
code path that ended up in dpu_plane_atomic_update(), even if the plane
was not involved in the current atomic update. While a bit dubious,
this worked before because plane->state would always point to something
valid. But now using drm_atomic_get_new_plane_state() we could get a
NULL state pointer instead, leading to:
[ 20.873273] Call trace:
[ 20.875740] dpu_plane_atomic_update+0x5c/0xed0
[ 20.880311] dpu_plane_restore+0x40/0x88
[ 20.884266] dpu_crtc_atomic_flush+0xf4/0x208
[ 20.888660] drm_atomic_helper_commit_planes+0x150/0x238
[ 20.894014] msm_atomic_commit_tail+0x1d4/0x7a0
[ 20.898579] commit_tail+0xa4/0x168
[ 20.902102] drm_atomic_helper_commit+0x164/0x178
[ 20.906841] drm_atomic_commit+0x54/0x60
[ 20.910798] drm_atomic_connector_commit_dpms+0x10c/0x118
[ 20.916236] drm_mode_obj_set_property_ioctl+0x1e4/0x440
[ 20.921588] drm_connector_property_set_ioctl+0x60/0x88
[ 20.926852] drm_ioctl_kernel+0xd0/0x120
[ 20.930807] drm_ioctl+0x21c/0x478
[ 20.934235] __arm64_sys_ioctl+0xa8/0xe0
[ 20.938193] invoke_syscall+0x64/0x130
[ 20.941977] el0_svc_common.constprop.3+0x5c/0xe0
[ 20.946716] do_el0_svc+0x80/0xa0
[ 20.950058] el0_svc+0x20/0x30
[ 20.953145] el0_sync_handler+0x88/0xb0
[ 20.957014] el0_sync+0x13c/0x140
The reason for the codepath seems dubious, the atomic suspend/resume
heplers should handle the power-collapse case. If not, the CRTC's
atomic_check() should be adding the planes to the atomic update.
Reported-by: Stephen Boyd <swboyd@chromium.org>
Reported-by: John Stultz <john.stultz@linaro.org>
Fixes: 37418bf14c ("drm: Use state helper instead of the plane state pointer")
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20210430171744.1721408-1-robdclark@gmail.com
138 lines
4.2 KiB
C
138 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
|
|
* Copyright (C) 2013 Red Hat
|
|
* Author: Rob Clark <robdclark@gmail.com>
|
|
*/
|
|
|
|
#ifndef _DPU_PLANE_H_
|
|
#define _DPU_PLANE_H_
|
|
|
|
#include <drm/drm_crtc.h>
|
|
|
|
#include "dpu_kms.h"
|
|
#include "dpu_hw_mdss.h"
|
|
#include "dpu_hw_sspp.h"
|
|
|
|
/**
|
|
* struct dpu_plane_state: Define dpu extension of drm plane state object
|
|
* @base: base drm plane state object
|
|
* @aspace: pointer to address space for input/output buffers
|
|
* @stage: assigned by crtc blender
|
|
* @needs_qos_remap: qos remap settings need to be updated
|
|
* @multirect_index: index of the rectangle of SSPP
|
|
* @multirect_mode: parallel or time multiplex multirect mode
|
|
* @pending: whether the current update is still pending
|
|
* @scaler3_cfg: configuration data for scaler3
|
|
* @pixel_ext: configuration data for pixel extensions
|
|
* @cdp_cfg: CDP configuration
|
|
* @plane_fetch_bw: calculated BW per plane
|
|
* @plane_clk: calculated clk per plane
|
|
*/
|
|
struct dpu_plane_state {
|
|
struct drm_plane_state base;
|
|
struct msm_gem_address_space *aspace;
|
|
enum dpu_stage stage;
|
|
bool needs_qos_remap;
|
|
uint32_t multirect_index;
|
|
uint32_t multirect_mode;
|
|
bool pending;
|
|
|
|
/* scaler configuration */
|
|
struct dpu_hw_scaler3_cfg scaler3_cfg;
|
|
struct dpu_hw_pixel_ext pixel_ext;
|
|
|
|
struct dpu_hw_pipe_cdp_cfg cdp_cfg;
|
|
u64 plane_fetch_bw;
|
|
u64 plane_clk;
|
|
};
|
|
|
|
/**
|
|
* struct dpu_multirect_plane_states: Defines multirect pair of drm plane states
|
|
* @r0: drm plane configured on rect 0
|
|
* @r1: drm plane configured on rect 1
|
|
*/
|
|
struct dpu_multirect_plane_states {
|
|
const struct drm_plane_state *r0;
|
|
const struct drm_plane_state *r1;
|
|
};
|
|
|
|
#define to_dpu_plane_state(x) \
|
|
container_of(x, struct dpu_plane_state, base)
|
|
|
|
/**
|
|
* dpu_plane_pipe - return sspp identifier for the given plane
|
|
* @plane: Pointer to DRM plane object
|
|
* Returns: sspp identifier of the given plane
|
|
*/
|
|
enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane);
|
|
|
|
/**
|
|
* is_dpu_plane_virtual - check for virtual plane
|
|
* @plane: Pointer to DRM plane object
|
|
* returns: true - if the plane is virtual
|
|
* false - if the plane is primary
|
|
*/
|
|
bool is_dpu_plane_virtual(struct drm_plane *plane);
|
|
|
|
/**
|
|
* dpu_plane_get_ctl_flush - get control flush mask
|
|
* @plane: Pointer to DRM plane object
|
|
* @ctl: Pointer to control hardware
|
|
* @flush_sspp: Pointer to sspp flush control word
|
|
*/
|
|
void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl,
|
|
u32 *flush_sspp);
|
|
|
|
/**
|
|
* dpu_plane_flush - final plane operations before commit flush
|
|
* @plane: Pointer to drm plane structure
|
|
*/
|
|
void dpu_plane_flush(struct drm_plane *plane);
|
|
|
|
/**
|
|
* dpu_plane_set_error: enable/disable error condition
|
|
* @plane: pointer to drm_plane structure
|
|
*/
|
|
void dpu_plane_set_error(struct drm_plane *plane, bool error);
|
|
|
|
/**
|
|
* dpu_plane_init - create new dpu plane for the given pipe
|
|
* @dev: Pointer to DRM device
|
|
* @pipe: dpu hardware pipe identifier
|
|
* @type: Plane type - PRIMARY/OVERLAY/CURSOR
|
|
* @possible_crtcs: bitmask of crtc that can be attached to the given pipe
|
|
* @master_plane_id: primary plane id of a multirect pipe. 0 value passed for
|
|
* a regular plane initialization. A non-zero primary plane
|
|
* id will be passed for a virtual pipe initialization.
|
|
*
|
|
*/
|
|
struct drm_plane *dpu_plane_init(struct drm_device *dev,
|
|
uint32_t pipe, enum drm_plane_type type,
|
|
unsigned long possible_crtcs, u32 master_plane_id);
|
|
|
|
/**
|
|
* dpu_plane_validate_multirecti_v2 - validate the multirect planes
|
|
* against hw limitations
|
|
* @plane: drm plate states of the multirect pair
|
|
*/
|
|
int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane);
|
|
|
|
/**
|
|
* dpu_plane_clear_multirect - clear multirect bits for the given pipe
|
|
* @drm_state: Pointer to DRM plane state
|
|
*/
|
|
void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state);
|
|
|
|
/**
|
|
* dpu_plane_color_fill - enables color fill on plane
|
|
* @plane: Pointer to DRM plane object
|
|
* @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
|
|
* @alpha: 8-bit fill alpha value, 255 selects 100% alpha
|
|
* Returns: 0 on success
|
|
*/
|
|
int dpu_plane_color_fill(struct drm_plane *plane,
|
|
uint32_t color, uint32_t alpha);
|
|
|
|
#endif /* _DPU_PLANE_H_ */
|