68f684e257
Add infrastructure to maintain a pending list of HWRM commands awaiting completion and reduce the scope of the hwrm_cmd_lock mutex so that it protects only the request mailbox. The mailbox is free to use for one or more concurrent commands after receiving deferred response events. For uniformity and completeness, use the same pending list for collecting completions for commands that respond via a completion ring. These commands are only used for freeing rings and for IRQ test and we only support one such command in flight. Note deferred responses are also only supported on the main channel. The secondary channel (KONG) does not support deferred responses. Signed-off-by: Edwin Peer <edwin.peer@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
146 lines
4.6 KiB
C
146 lines
4.6 KiB
C
/* Broadcom NetXtreme-C/E network driver.
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*
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* Copyright (c) 2020 Broadcom Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*/
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#ifndef BNXT_HWRM_H
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#define BNXT_HWRM_H
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#include "bnxt_hsi.h"
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enum bnxt_hwrm_ctx_flags {
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/* Update the HWRM_API_FLAGS right below for any new non-internal bit added here */
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BNXT_HWRM_INTERNAL_CTX_OWNED = BIT(0), /* caller owns the context */
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BNXT_HWRM_INTERNAL_RESP_DIRTY = BIT(1), /* response contains data */
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BNXT_HWRM_CTX_SILENT = BIT(2), /* squelch firmware errors */
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BNXT_HWRM_FULL_WAIT = BIT(3), /* wait for full timeout of HWRM command */
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};
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#define HWRM_API_FLAGS (BNXT_HWRM_CTX_SILENT | BNXT_HWRM_FULL_WAIT)
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struct bnxt_hwrm_ctx {
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u64 sentinel;
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dma_addr_t dma_handle;
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struct output *resp;
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struct input *req;
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dma_addr_t slice_handle;
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void *slice_addr;
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u32 slice_size;
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u32 req_len;
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enum bnxt_hwrm_ctx_flags flags;
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unsigned int timeout;
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u32 allocated;
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gfp_t gfp;
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};
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enum bnxt_hwrm_wait_state {
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BNXT_HWRM_PENDING,
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BNXT_HWRM_DEFERRED,
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BNXT_HWRM_COMPLETE,
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BNXT_HWRM_CANCELLED,
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};
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enum bnxt_hwrm_chnl { BNXT_HWRM_CHNL_CHIMP, BNXT_HWRM_CHNL_KONG };
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struct bnxt_hwrm_wait_token {
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struct rcu_head rcu;
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struct hlist_node node;
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enum bnxt_hwrm_wait_state state;
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enum bnxt_hwrm_chnl dst;
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u16 seq_id;
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};
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void hwrm_update_token(struct bnxt *bp, u16 seq, enum bnxt_hwrm_wait_state s);
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#define BNXT_HWRM_MAX_REQ_LEN (bp->hwrm_max_req_len)
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#define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
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#define HWRM_CMD_MAX_TIMEOUT 40000
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#define SHORT_HWRM_CMD_TIMEOUT 20
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#define HWRM_CMD_TIMEOUT (bp->hwrm_cmd_timeout)
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#define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4)
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#define HWRM_COREDUMP_TIMEOUT ((HWRM_CMD_TIMEOUT) * 12)
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#define BNXT_HWRM_TARGET 0xffff
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#define BNXT_HWRM_NO_CMPL_RING -1
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#define BNXT_HWRM_REQ_MAX_SIZE 128
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#define BNXT_HWRM_DMA_SIZE (2 * PAGE_SIZE) /* space for req+resp */
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#define BNXT_HWRM_RESP_RESERVED PAGE_SIZE
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#define BNXT_HWRM_RESP_OFFSET (BNXT_HWRM_DMA_SIZE - \
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BNXT_HWRM_RESP_RESERVED)
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#define BNXT_HWRM_CTX_OFFSET (BNXT_HWRM_RESP_OFFSET - \
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sizeof(struct bnxt_hwrm_ctx))
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#define BNXT_HWRM_DMA_ALIGN 16
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#define BNXT_HWRM_SENTINEL 0xb6e1f68a12e9a7eb /* arbitrary value */
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#define BNXT_HWRM_REQS_PER_PAGE (BNXT_PAGE_SIZE / \
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BNXT_HWRM_REQ_MAX_SIZE)
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#define HWRM_SHORT_MIN_TIMEOUT 3
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#define HWRM_SHORT_MAX_TIMEOUT 10
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#define HWRM_SHORT_TIMEOUT_COUNTER 5
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#define HWRM_MIN_TIMEOUT 25
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#define HWRM_MAX_TIMEOUT 40
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#define HWRM_WAIT_MUST_ABORT(bp, ctx) \
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(le16_to_cpu((ctx)->req->req_type) != HWRM_VER_GET && \
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!bnxt_is_fw_healthy(bp))
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static inline unsigned int hwrm_total_timeout(unsigned int n)
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{
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return n <= HWRM_SHORT_TIMEOUT_COUNTER ? n * HWRM_SHORT_MIN_TIMEOUT :
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HWRM_SHORT_TIMEOUT_COUNTER * HWRM_SHORT_MIN_TIMEOUT +
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(n - HWRM_SHORT_TIMEOUT_COUNTER) * HWRM_MIN_TIMEOUT;
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}
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#define HWRM_VALID_BIT_DELAY_USEC 150
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static inline bool bnxt_cfa_hwrm_message(u16 req_type)
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{
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switch (req_type) {
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case HWRM_CFA_ENCAP_RECORD_ALLOC:
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case HWRM_CFA_ENCAP_RECORD_FREE:
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case HWRM_CFA_DECAP_FILTER_ALLOC:
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case HWRM_CFA_DECAP_FILTER_FREE:
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case HWRM_CFA_EM_FLOW_ALLOC:
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case HWRM_CFA_EM_FLOW_FREE:
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case HWRM_CFA_EM_FLOW_CFG:
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case HWRM_CFA_FLOW_ALLOC:
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case HWRM_CFA_FLOW_FREE:
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case HWRM_CFA_FLOW_INFO:
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case HWRM_CFA_FLOW_FLUSH:
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case HWRM_CFA_FLOW_STATS:
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case HWRM_CFA_METER_PROFILE_ALLOC:
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case HWRM_CFA_METER_PROFILE_FREE:
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case HWRM_CFA_METER_PROFILE_CFG:
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case HWRM_CFA_METER_INSTANCE_ALLOC:
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case HWRM_CFA_METER_INSTANCE_FREE:
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return true;
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default:
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return false;
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}
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}
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static inline bool bnxt_kong_hwrm_message(struct bnxt *bp, struct input *req)
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{
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return (bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL &&
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(bnxt_cfa_hwrm_message(le16_to_cpu(req->req_type)) ||
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le16_to_cpu(req->target_id) == HWRM_TARGET_ID_KONG));
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}
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int __hwrm_req_init(struct bnxt *bp, void **req, u16 req_type, u32 req_len);
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#define hwrm_req_init(bp, req, req_type) \
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__hwrm_req_init((bp), (void **)&(req), (req_type), sizeof(*(req)))
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void *hwrm_req_hold(struct bnxt *bp, void *req);
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void hwrm_req_drop(struct bnxt *bp, void *req);
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void hwrm_req_flags(struct bnxt *bp, void *req, enum bnxt_hwrm_ctx_flags flags);
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void hwrm_req_timeout(struct bnxt *bp, void *req, unsigned int timeout);
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int hwrm_req_send(struct bnxt *bp, void *req);
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int hwrm_req_send_silent(struct bnxt *bp, void *req);
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int hwrm_req_replace(struct bnxt *bp, void *req, void *new_req, u32 len);
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void hwrm_req_alloc_flags(struct bnxt *bp, void *req, gfp_t flags);
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void *hwrm_req_dma_slice(struct bnxt *bp, void *req, u32 size, dma_addr_t *dma);
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#endif
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