forked from Minki/linux
3f5f0a4475
Convert the MIPS SEAD-3 board support to be a generic board, supported by generic kernels. Because the SEAD-3 boot protocol was defined long ago and we don't want to force a switch to the UHI protocol, SEAD-3 is added as a legacy board which is detected by reading the REVISION register. This may technically not be a valid memory read & future work will include attempting to handle that gracefully. In practice since SEAD-3 is the only legacy board supported by the generic kernel so far the read will only happen on SEAD-3 boards, and even once Malta is converted the same REVISION register exists there too. Other boards such as Boston, Ci20 & Ci40 will use the UHI boot protocol & thus not run any of the legacy board detect functions. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
377 lines
9.0 KiB
C
377 lines
9.0 KiB
C
/*
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* Copyright (C) 2016 Imagination Technologies
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* Author: Paul Burton <paul.burton@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#define pr_fmt(fmt) "sead3: " fmt
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#include <linux/errno.h>
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#include <linux/libfdt.h>
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#include <linux/printk.h>
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#include <asm/fw/fw.h>
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#include <asm/io.h>
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#include <asm/machine.h>
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#define SEAD_CONFIG CKSEG1ADDR(0x1b100110)
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#define SEAD_CONFIG_GIC_PRESENT BIT(1)
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#define MIPS_REVISION CKSEG1ADDR(0x1fc00010)
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#define MIPS_REVISION_MACHINE (0xf << 4)
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#define MIPS_REVISION_MACHINE_SEAD3 (0x4 << 4)
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static __init bool sead3_detect(void)
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{
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uint32_t rev;
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rev = __raw_readl((void *)MIPS_REVISION);
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return (rev & MIPS_REVISION_MACHINE) == MIPS_REVISION_MACHINE_SEAD3;
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}
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static __init int append_cmdline(void *fdt)
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{
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int err, chosen_off;
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/* find or add chosen node */
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chosen_off = fdt_path_offset(fdt, "/chosen");
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if (chosen_off == -FDT_ERR_NOTFOUND)
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chosen_off = fdt_path_offset(fdt, "/chosen@0");
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if (chosen_off == -FDT_ERR_NOTFOUND)
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chosen_off = fdt_add_subnode(fdt, 0, "chosen");
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if (chosen_off < 0) {
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pr_err("Unable to find or add DT chosen node: %d\n",
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chosen_off);
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return chosen_off;
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}
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err = fdt_setprop_string(fdt, chosen_off, "bootargs", fw_getcmdline());
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if (err) {
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pr_err("Unable to set bootargs property: %d\n", err);
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return err;
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}
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return 0;
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}
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static __init int append_memory(void *fdt)
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{
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unsigned long phys_memsize, memsize;
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__be32 mem_array[2];
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int err, mem_off;
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char *var;
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/* find memory size from the bootloader environment */
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var = fw_getenv("memsize");
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if (var) {
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err = kstrtoul(var, 0, &phys_memsize);
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if (err) {
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pr_err("Failed to read memsize env variable '%s'\n",
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var);
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return -EINVAL;
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}
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} else {
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pr_warn("The bootloader didn't provide memsize: defaulting to 32MB\n");
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phys_memsize = 32 << 20;
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}
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/* default to using all available RAM */
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memsize = phys_memsize;
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/* allow the user to override the usable memory */
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var = strstr(arcs_cmdline, "memsize=");
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if (var)
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memsize = memparse(var + strlen("memsize="), NULL);
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/* if the user says there's more RAM than we thought, believe them */
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phys_memsize = max_t(unsigned long, phys_memsize, memsize);
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/* find or add a memory node */
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mem_off = fdt_path_offset(fdt, "/memory");
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if (mem_off == -FDT_ERR_NOTFOUND)
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mem_off = fdt_add_subnode(fdt, 0, "memory");
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if (mem_off < 0) {
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pr_err("Unable to find or add memory DT node: %d\n", mem_off);
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return mem_off;
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}
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err = fdt_setprop_string(fdt, mem_off, "device_type", "memory");
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if (err) {
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pr_err("Unable to set memory node device_type: %d\n", err);
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return err;
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}
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mem_array[0] = 0;
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mem_array[1] = cpu_to_be32(phys_memsize);
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err = fdt_setprop(fdt, mem_off, "reg", mem_array, sizeof(mem_array));
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if (err) {
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pr_err("Unable to set memory regs property: %d\n", err);
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return err;
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}
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mem_array[0] = 0;
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mem_array[1] = cpu_to_be32(memsize);
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err = fdt_setprop(fdt, mem_off, "linux,usable-memory",
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mem_array, sizeof(mem_array));
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if (err) {
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pr_err("Unable to set linux,usable-memory property: %d\n", err);
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return err;
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}
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return 0;
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}
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static __init int remove_gic(void *fdt)
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{
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const unsigned int cpu_ehci_int = 2;
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const unsigned int cpu_uart_int = 4;
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const unsigned int cpu_eth_int = 6;
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int gic_off, cpu_off, uart_off, eth_off, ehci_off, err;
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uint32_t cfg, cpu_phandle;
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/* leave the GIC node intact if a GIC is present */
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cfg = __raw_readl((uint32_t *)SEAD_CONFIG);
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if (cfg & SEAD_CONFIG_GIC_PRESENT)
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return 0;
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gic_off = fdt_node_offset_by_compatible(fdt, -1, "mti,gic");
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if (gic_off < 0) {
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pr_err("unable to find DT GIC node: %d\n", gic_off);
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return gic_off;
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}
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err = fdt_nop_node(fdt, gic_off);
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if (err) {
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pr_err("unable to nop GIC node\n");
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return err;
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}
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cpu_off = fdt_node_offset_by_compatible(fdt, -1,
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"mti,cpu-interrupt-controller");
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if (cpu_off < 0) {
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pr_err("unable to find CPU intc node: %d\n", cpu_off);
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return cpu_off;
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}
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cpu_phandle = fdt_get_phandle(fdt, cpu_off);
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if (!cpu_phandle) {
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pr_err("unable to get CPU intc phandle\n");
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return -EINVAL;
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}
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err = fdt_setprop_u32(fdt, 0, "interrupt-parent", cpu_phandle);
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if (err) {
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pr_err("unable to set root interrupt-parent: %d\n", err);
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return err;
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}
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uart_off = fdt_node_offset_by_compatible(fdt, -1, "ns16550a");
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while (uart_off >= 0) {
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err = fdt_setprop_u32(fdt, uart_off, "interrupts",
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cpu_uart_int);
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if (err) {
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pr_err("unable to set UART interrupts property: %d\n",
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err);
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return err;
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}
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uart_off = fdt_node_offset_by_compatible(fdt, uart_off,
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"ns16550a");
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}
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if (uart_off != -FDT_ERR_NOTFOUND) {
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pr_err("error searching for UART DT node: %d\n", uart_off);
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return uart_off;
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}
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eth_off = fdt_node_offset_by_compatible(fdt, -1, "smsc,lan9115");
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if (eth_off < 0) {
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pr_err("unable to find ethernet DT node: %d\n", eth_off);
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return eth_off;
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}
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err = fdt_setprop_u32(fdt, eth_off, "interrupts", cpu_eth_int);
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if (err) {
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pr_err("unable to set ethernet interrupts property: %d\n", err);
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return err;
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}
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ehci_off = fdt_node_offset_by_compatible(fdt, -1, "generic-ehci");
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if (ehci_off < 0) {
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pr_err("unable to find EHCI DT node: %d\n", ehci_off);
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return ehci_off;
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}
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err = fdt_setprop_u32(fdt, ehci_off, "interrupts", cpu_ehci_int);
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if (err) {
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pr_err("unable to set EHCI interrupts property: %d\n", err);
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return err;
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}
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return 0;
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}
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static __init int serial_config(void *fdt)
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{
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const char *yamontty, *mode_var;
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char mode_var_name[9], path[18], parity;
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unsigned int uart, baud, stop_bits;
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bool hw_flow;
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int chosen_off, err;
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yamontty = fw_getenv("yamontty");
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if (!yamontty || !strcmp(yamontty, "tty0")) {
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uart = 0;
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} else if (!strcmp(yamontty, "tty1")) {
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uart = 1;
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} else {
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pr_warn("yamontty environment variable '%s' invalid\n",
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yamontty);
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uart = 0;
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}
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baud = stop_bits = 0;
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parity = 0;
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hw_flow = false;
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snprintf(mode_var_name, sizeof(mode_var_name), "modetty%u", uart);
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mode_var = fw_getenv(mode_var_name);
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if (mode_var) {
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while (mode_var[0] >= '0' && mode_var[0] <= '9') {
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baud *= 10;
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baud += mode_var[0] - '0';
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mode_var++;
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}
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if (mode_var[0] == ',')
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mode_var++;
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if (mode_var[0])
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parity = mode_var[0];
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if (mode_var[0] == ',')
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mode_var++;
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if (mode_var[0])
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stop_bits = mode_var[0] - '0';
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if (mode_var[0] == ',')
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mode_var++;
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if (!strcmp(mode_var, "hw"))
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hw_flow = true;
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}
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if (!baud)
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baud = 38400;
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if (parity != 'e' && parity != 'n' && parity != 'o')
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parity = 'n';
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if (stop_bits != 7 && stop_bits != 8)
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stop_bits = 8;
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WARN_ON(snprintf(path, sizeof(path), "uart%u:%u%c%u%s",
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uart, baud, parity, stop_bits,
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hw_flow ? "r" : "") >= sizeof(path));
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/* find or add chosen node */
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chosen_off = fdt_path_offset(fdt, "/chosen");
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if (chosen_off == -FDT_ERR_NOTFOUND)
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chosen_off = fdt_path_offset(fdt, "/chosen@0");
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if (chosen_off == -FDT_ERR_NOTFOUND)
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chosen_off = fdt_add_subnode(fdt, 0, "chosen");
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if (chosen_off < 0) {
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pr_err("Unable to find or add DT chosen node: %d\n",
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chosen_off);
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return chosen_off;
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}
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err = fdt_setprop_string(fdt, chosen_off, "stdout-path", path);
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if (err) {
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pr_err("Unable to set stdout-path property: %d\n", err);
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return err;
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}
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return 0;
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}
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static __init const void *sead3_fixup_fdt(const void *fdt,
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const void *match_data)
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{
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static unsigned char fdt_buf[16 << 10] __initdata;
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int err;
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if (fdt_check_header(fdt))
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panic("Corrupt DT");
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/* if this isn't SEAD3, something went wrong */
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BUG_ON(fdt_node_check_compatible(fdt, 0, "mti,sead-3"));
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fw_init_cmdline();
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err = fdt_open_into(fdt, fdt_buf, sizeof(fdt_buf));
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if (err)
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panic("Unable to open FDT: %d", err);
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err = append_cmdline(fdt_buf);
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if (err)
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panic("Unable to patch FDT: %d", err);
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err = append_memory(fdt_buf);
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if (err)
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panic("Unable to patch FDT: %d", err);
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err = remove_gic(fdt_buf);
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if (err)
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panic("Unable to patch FDT: %d", err);
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err = serial_config(fdt_buf);
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if (err)
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panic("Unable to patch FDT: %d", err);
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err = fdt_pack(fdt_buf);
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if (err)
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panic("Unable to pack FDT: %d\n", err);
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return fdt_buf;
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}
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static __init unsigned int sead3_measure_hpt_freq(void)
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{
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void __iomem *status_reg = (void __iomem *)0xbf000410;
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unsigned int freq, orig, tick = 0;
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unsigned long flags;
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local_irq_save(flags);
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orig = readl(status_reg) & 0x2; /* get original sample */
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/* wait for transition */
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while ((readl(status_reg) & 0x2) == orig)
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;
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orig = orig ^ 0x2; /* flip the bit */
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write_c0_count(0);
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/* wait 1 second (the sampling clock transitions every 10ms) */
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while (tick < 100) {
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/* wait for transition */
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while ((readl(status_reg) & 0x2) == orig)
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;
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orig = orig ^ 0x2; /* flip the bit */
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tick++;
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}
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freq = read_c0_count();
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local_irq_restore(flags);
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return freq;
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}
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extern char __dtb_sead3_begin[];
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MIPS_MACHINE(sead3) = {
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.fdt = __dtb_sead3_begin,
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.detect = sead3_detect,
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.fixup_fdt = sead3_fixup_fdt,
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.measure_hpt_freq = sead3_measure_hpt_freq,
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};
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