forked from Minki/linux
2572f00db8
This adds support for the Microchip PIC32 MIPS microcontroller with the specific variant PIC32MZDA. PIC32MZDA is based on the MIPS m14KEc core and boots using device tree. This includes an early pin setup and early clock setup needed prior to device tree being initialized. In additon, an interface is provided to synchronize access to registers shared across several peripherals. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12097/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
74 lines
1.7 KiB
C
74 lines
1.7 KiB
C
/*
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* Joshua Henderson <joshua.henderson@microchip.com>
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/irqdomain.h>
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#include <asm/time.h>
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#include "pic32mzda.h"
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static const struct of_device_id pic32_infra_match[] = {
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{ .compatible = "microchip,pic32mzda-infra", },
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{ },
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};
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#define DEFAULT_CORE_TIMER_INTERRUPT 0
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static unsigned int pic32_xlate_core_timer_irq(void)
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{
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static struct device_node *node;
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unsigned int irq;
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node = of_find_matching_node(NULL, pic32_infra_match);
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if (WARN_ON(!node))
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goto default_map;
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irq = irq_of_parse_and_map(node, 0);
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if (!irq)
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goto default_map;
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return irq;
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default_map:
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return irq_create_mapping(NULL, DEFAULT_CORE_TIMER_INTERRUPT);
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}
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unsigned int get_c0_compare_int(void)
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{
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return pic32_xlate_core_timer_irq();
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}
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void __init plat_time_init(void)
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{
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struct clk *clk;
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of_clk_init(NULL);
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clk = clk_get_sys("cpu_clk", NULL);
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if (IS_ERR(clk))
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panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
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clk_prepare_enable(clk);
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pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
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mips_hpt_frequency = clk_get_rate(clk) / 2;
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clocksource_probe();
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}
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