c482feefe1
The TSS is a fairly juicy target for exploits, and, now that the TSS is in the cpu_entry_area, it's no longer protected by kASLR. Make it read-only on x86_64. On x86_32, it can't be RO because it's written by the CPU during task switches, and we use a task gate for double faults. I'd also be nervous about errata if we tried to make it RO even on configurations without double fault handling. [ tglx: AMD confirmed that there is no problem on 64-bit with TSS RO. So it's probably safe to assume that it's a non issue, though Intel might have been creative in that area. Still waiting for confirmation. ] Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bpetkov@suse.de> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Laight <David.Laight@aculab.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Eduardo Valentin <eduval@amazon.com> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Juergen Gross <jgross@suse.com> Cc: Kees Cook <keescook@chromium.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Will Deacon <will.deacon@arm.com> Cc: aliguori@amazon.com Cc: daniel.gruss@iaik.tugraz.at Cc: hughd@google.com Cc: keescook@google.com Link: https://lkml.kernel.org/r/20171204150606.733700132@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
62 lines
1.7 KiB
C
62 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#ifndef __LINUX_KBUILD_H
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# error "Please do not build this file directly, build asm-offsets.c instead"
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#endif
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#include <asm/ucontext.h>
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#define __SYSCALL_I386(nr, sym, qual) [nr] = 1,
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static char syscalls[] = {
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#include <asm/syscalls_32.h>
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};
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/* workaround for a warning with -Wmissing-prototypes */
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void foo(void);
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void foo(void)
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{
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OFFSET(CPUINFO_x86, cpuinfo_x86, x86);
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OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);
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OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);
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OFFSET(CPUINFO_x86_mask, cpuinfo_x86, x86_mask);
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OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);
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OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);
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OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);
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BLANK();
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OFFSET(PT_EBX, pt_regs, bx);
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OFFSET(PT_ECX, pt_regs, cx);
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OFFSET(PT_EDX, pt_regs, dx);
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OFFSET(PT_ESI, pt_regs, si);
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OFFSET(PT_EDI, pt_regs, di);
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OFFSET(PT_EBP, pt_regs, bp);
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OFFSET(PT_EAX, pt_regs, ax);
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OFFSET(PT_DS, pt_regs, ds);
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OFFSET(PT_ES, pt_regs, es);
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OFFSET(PT_FS, pt_regs, fs);
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OFFSET(PT_GS, pt_regs, gs);
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OFFSET(PT_ORIG_EAX, pt_regs, orig_ax);
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OFFSET(PT_EIP, pt_regs, ip);
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OFFSET(PT_CS, pt_regs, cs);
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OFFSET(PT_EFLAGS, pt_regs, flags);
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OFFSET(PT_OLDESP, pt_regs, sp);
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OFFSET(PT_OLDSS, pt_regs, ss);
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BLANK();
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OFFSET(saved_context_gdt_desc, saved_context, gdt_desc);
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BLANK();
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/* Offset from the sysenter stack to tss.sp0 */
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DEFINE(TSS_sysenter_sp0, offsetof(struct cpu_entry_area, tss.x86_tss.sp0) -
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offsetofend(struct cpu_entry_area, SYSENTER_stack_page.stack));
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#ifdef CONFIG_CC_STACKPROTECTOR
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BLANK();
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OFFSET(stack_canary_offset, stack_canary, canary);
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#endif
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BLANK();
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DEFINE(__NR_syscall_max, sizeof(syscalls) - 1);
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DEFINE(NR_syscalls, sizeof(syscalls));
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}
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