6110ccecd3
With commit f0cbd3b83e ("s390/atomic: circumvent gcc 10 build
regression") there was an attempt to workaroud a gcc build bug,
however with the workaround a similar problem with clang appeared.
It was recommended to use a workaround which would fail again with
gcc. Therefore simply remove the optimization. It is just not worth
the effort.
Besides that all of this will be changed to use compiler atomic
builtins instead anyway.
See https://reviews.llvm.org/D90231
and https://reviews.llvm.org/D91786
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
139 lines
3.0 KiB
C
139 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 1999, 2016
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Denis Joseph Barrow,
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* Arnd Bergmann,
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*/
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#ifndef __ARCH_S390_ATOMIC__
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#define __ARCH_S390_ATOMIC__
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/atomic_ops.h>
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#include <asm/barrier.h>
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#include <asm/cmpxchg.h>
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static inline int atomic_read(const atomic_t *v)
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{
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int c;
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asm volatile(
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" l %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic_set(atomic_t *v, int i)
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{
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asm volatile(
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" st %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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return __atomic_add_barrier(i, &v->counter) + i;
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}
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static inline int atomic_fetch_add(int i, atomic_t *v)
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{
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return __atomic_add_barrier(i, &v->counter);
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}
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static inline void atomic_add(int i, atomic_t *v)
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{
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__atomic_add(i, &v->counter);
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}
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#define atomic_sub(_i, _v) atomic_add(-(int)(_i), _v)
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#define atomic_sub_return(_i, _v) atomic_add_return(-(int)(_i), _v)
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#define atomic_fetch_sub(_i, _v) atomic_fetch_add(-(int)(_i), _v)
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#define ATOMIC_OPS(op) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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__atomic_##op(i, &v->counter); \
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} \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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return __atomic_##op##_barrier(i, &v->counter); \
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}
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#undef ATOMIC_OPS
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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return __atomic_cmpxchg(&v->counter, old, new);
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}
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#define ATOMIC64_INIT(i) { (i) }
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static inline s64 atomic64_read(const atomic64_t *v)
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{
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s64 c;
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asm volatile(
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" lg %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic64_set(atomic64_t *v, s64 i)
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{
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asm volatile(
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" stg %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline s64 atomic64_add_return(s64 i, atomic64_t *v)
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{
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return __atomic64_add_barrier(i, (long *)&v->counter) + i;
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}
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static inline s64 atomic64_fetch_add(s64 i, atomic64_t *v)
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{
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return __atomic64_add_barrier(i, (long *)&v->counter);
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}
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static inline void atomic64_add(s64 i, atomic64_t *v)
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{
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__atomic64_add(i, (long *)&v->counter);
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}
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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static inline s64 atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
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{
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return __atomic64_cmpxchg((long *)&v->counter, old, new);
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}
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#define ATOMIC64_OPS(op) \
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static inline void atomic64_##op(s64 i, atomic64_t *v) \
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{ \
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__atomic64_##op(i, (long *)&v->counter); \
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} \
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static inline long atomic64_fetch_##op(s64 i, atomic64_t *v) \
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{ \
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return __atomic64_##op##_barrier(i, (long *)&v->counter); \
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}
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ATOMIC64_OPS(and)
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ATOMIC64_OPS(or)
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ATOMIC64_OPS(xor)
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#undef ATOMIC64_OPS
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#define atomic64_sub_return(_i, _v) atomic64_add_return(-(s64)(_i), _v)
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#define atomic64_fetch_sub(_i, _v) atomic64_fetch_add(-(s64)(_i), _v)
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#define atomic64_sub(_i, _v) atomic64_add(-(s64)(_i), _v)
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#endif /* __ARCH_S390_ATOMIC__ */
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