linux/drivers/gpu
Weinan Li a2ae95af96 drm/i915/gvt: update CSB and CSB write pointer in virtual HWSP
The engine provides a mirror of the CSB and CSB write pointer in the HWSP.
Read these status from virtual HWSP in VM can reduce CPU utilization while
applications have much more short GPU workloads. Here we update the
corresponding data in virtual HWSP as it in virtual MMIO.

Before read these status from HWSP in GVT-g VM, please ensure the host
support it by checking the BIT(3) of caps in PVINFO.

Virtual HWSP only support GEN8+ platform, since the HWSP MMIO may change
follow the platform update, please add the corresponding MMIO emulation
when enable new platforms in GVT-g.

v3 : Add address audit in HWSP address update.

v4 :
     Separate this patch with enalbe virtual HWSP in VM.
     Use intel_gvt_render_mmio_to_ring_id() to determine ring_id by offset.

v5 : Remove unnessary check about Gen8, GVT-g only support Gen8+.

Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-11-16 11:48:31 +08:00
..
drm drm/i915/gvt: update CSB and CSB write pointer in virtual HWSP 2017-11-16 11:48:31 +08:00
host1x gpu: host1x: Fix incorrect comment for channel_request 2017-10-20 14:19:52 +02:00
ipu-v3 gpu: ipu-v3: pre: implement workaround for ERR009624 2017-10-11 12:04:24 +02:00
vga vgaarb: Factor out EFI and fallback default device selection 2017-10-18 10:04:56 +02:00
Makefile