forked from Minki/linux
4be35e236c
MFP configurations after resume should be done before the GPIO registers are restored. Move the mfp sysdev registeration to the same place where GPIO and IRQ sysdev(s) are registered to better control the order. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
256 lines
6.0 KiB
C
256 lines
6.0 KiB
C
/*
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* linux/arch/arm/mach-pxa/mfp.c
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*
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* PXA3xx Multi-Function Pin Support
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*
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* Copyright (C) 2007 Marvell Internation Ltd.
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*
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* 2007-08-21: eric miao <eric.miao@marvell.com>
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* initial version
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/sysdev.h>
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#include <asm/hardware.h>
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#include <asm/arch/mfp.h>
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#include <asm/arch/mfp-pxa3xx.h>
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#include <asm/arch/pxa3xx-regs.h>
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/* mfp_spin_lock is used to ensure that MFP register configuration
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* (most likely a read-modify-write operation) is atomic, and that
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* mfp_table[] is consistent
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*/
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static DEFINE_SPINLOCK(mfp_spin_lock);
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static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE);
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struct pxa3xx_mfp_pin {
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unsigned long config; /* -1 for not configured */
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unsigned long mfpr_off; /* MFPRxx Register offset */
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unsigned long mfpr_run; /* Run-Mode Register Value */
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unsigned long mfpr_lpm; /* Low Power Mode Register Value */
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};
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static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX];
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/* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
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const static unsigned long mfpr_lpm[] = {
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MFPR_LPM_INPUT,
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MFPR_LPM_DRIVE_LOW,
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MFPR_LPM_DRIVE_HIGH,
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MFPR_LPM_PULL_LOW,
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MFPR_LPM_PULL_HIGH,
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MFPR_LPM_FLOAT,
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};
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/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
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const static unsigned long mfpr_pull[] = {
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MFPR_PULL_NONE,
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MFPR_PULL_LOW,
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MFPR_PULL_HIGH,
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MFPR_PULL_BOTH,
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};
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/* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
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const static unsigned long mfpr_edge[] = {
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MFPR_EDGE_NONE,
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MFPR_EDGE_RISE,
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MFPR_EDGE_FALL,
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MFPR_EDGE_BOTH,
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};
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#define mfpr_readl(off) \
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__raw_readl(mfpr_mmio_base + (off))
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#define mfpr_writel(off, val) \
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__raw_writel(val, mfpr_mmio_base + (off))
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#define mfp_configured(p) ((p)->config != -1)
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/*
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* perform a read-back of any MFPR register to make sure the
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* previous writings are finished
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*/
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#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
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static inline void __mfp_config_run(struct pxa3xx_mfp_pin *p)
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{
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if (mfp_configured(p))
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mfpr_writel(p->mfpr_off, p->mfpr_run);
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}
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static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin *p)
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{
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if (mfp_configured(p)) {
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unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
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if (mfpr_clr != p->mfpr_run)
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mfpr_writel(p->mfpr_off, mfpr_clr);
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if (p->mfpr_lpm != mfpr_clr)
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mfpr_writel(p->mfpr_off, p->mfpr_lpm);
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}
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}
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void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num)
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{
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unsigned long flags;
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int i;
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spin_lock_irqsave(&mfp_spin_lock, flags);
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for (i = 0; i < num; i++, mfp_cfgs++) {
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unsigned long tmp, c = *mfp_cfgs;
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struct pxa3xx_mfp_pin *p;
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int pin, af, drv, lpm, edge, pull;
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pin = MFP_PIN(c);
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BUG_ON(pin >= MFP_PIN_MAX);
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p = &mfp_table[pin];
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af = MFP_AF(c);
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drv = MFP_DS(c);
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lpm = MFP_LPM_STATE(c);
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edge = MFP_LPM_EDGE(c);
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pull = MFP_PULL(c);
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/* run-mode pull settings will conflict with MFPR bits of
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* low power mode state, calculate mfpr_run and mfpr_lpm
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* individually if pull != MFP_PULL_NONE
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*/
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tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
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if (likely(pull == MFP_PULL_NONE)) {
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p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
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p->mfpr_lpm = p->mfpr_run;
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} else {
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p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
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p->mfpr_run = tmp | mfpr_pull[pull];
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}
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p->config = c; __mfp_config_run(p);
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}
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mfpr_sync();
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spin_unlock_irqrestore(&mfp_spin_lock, flags);
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}
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unsigned long pxa3xx_mfp_read(int mfp)
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{
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unsigned long val, flags;
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BUG_ON(mfp >= MFP_PIN_MAX);
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spin_lock_irqsave(&mfp_spin_lock, flags);
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val = mfpr_readl(mfp_table[mfp].mfpr_off);
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spin_unlock_irqrestore(&mfp_spin_lock, flags);
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return val;
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}
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void pxa3xx_mfp_write(int mfp, unsigned long val)
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{
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unsigned long flags;
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BUG_ON(mfp >= MFP_PIN_MAX);
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spin_lock_irqsave(&mfp_spin_lock, flags);
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mfpr_writel(mfp_table[mfp].mfpr_off, val);
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mfpr_sync();
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spin_unlock_irqrestore(&mfp_spin_lock, flags);
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}
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void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map)
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{
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struct pxa3xx_mfp_addr_map *p;
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unsigned long offset, flags;
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int i;
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spin_lock_irqsave(&mfp_spin_lock, flags);
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for (p = map; p->start != MFP_PIN_INVALID; p++) {
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offset = p->offset;
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i = p->start;
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do {
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mfp_table[i].mfpr_off = offset;
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mfp_table[i].mfpr_run = 0;
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mfp_table[i].mfpr_lpm = 0;
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offset += 4; i++;
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} while ((i <= p->end) && (p->end != -1));
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}
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spin_unlock_irqrestore(&mfp_spin_lock, flags);
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}
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void __init pxa3xx_init_mfp(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
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mfp_table[i].config = -1;
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}
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#ifdef CONFIG_PM
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/*
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* Configure the MFPs appropriately for suspend/resume.
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* FIXME: this should probably depend on which system state we're
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* entering - for instance, we might not want to place MFP pins in
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* a pull-down mode if they're an active low chip select, and we're
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* just entering standby.
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*/
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static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state)
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{
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int pin;
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for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) {
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struct pxa3xx_mfp_pin *p = &mfp_table[pin];
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__mfp_config_lpm(p);
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}
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return 0;
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}
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static int pxa3xx_mfp_resume(struct sys_device *d)
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{
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int pin;
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for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) {
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struct pxa3xx_mfp_pin *p = &mfp_table[pin];
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__mfp_config_run(p);
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}
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/* clear RDH bit when MFP settings are restored
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*
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* NOTE: the last 3 bits DxS are write-1-to-clear so carefully
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* preserve them here in case they will be referenced later
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*/
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ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
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return 0;
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}
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#else
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#define pxa3xx_mfp_suspend NULL
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#define pxa3xx_mfp_resume NULL
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#endif
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struct sysdev_class pxa3xx_mfp_sysclass = {
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.name = "mfp",
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.suspend = pxa3xx_mfp_suspend,
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.resume = pxa3xx_mfp_resume,
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};
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static int __init mfp_init_devicefs(void)
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{
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if (cpu_is_pxa3xx())
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return sysdev_class_register(&pxa3xx_mfp_sysclass);
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return 0;
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}
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postcore_initcall(mfp_init_devicefs);
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