forked from Minki/linux
60757ee62b
cec_allocate_adapter never returns NULL, so just use IS_ERR instead of PTR_ERR_OR_ZERO. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
811 lines
22 KiB
C
811 lines
22 KiB
C
/*
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* Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/sched/types.h>
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#include <media/cec-pin.h>
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#include "cec-pin-priv.h"
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/* All timings are in microseconds */
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/* start bit timings */
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#define CEC_TIM_START_BIT_LOW 3700
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#define CEC_TIM_START_BIT_LOW_MIN 3500
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#define CEC_TIM_START_BIT_LOW_MAX 3900
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#define CEC_TIM_START_BIT_TOTAL 4500
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#define CEC_TIM_START_BIT_TOTAL_MIN 4300
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#define CEC_TIM_START_BIT_TOTAL_MAX 4700
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/* data bit timings */
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#define CEC_TIM_DATA_BIT_0_LOW 1500
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#define CEC_TIM_DATA_BIT_0_LOW_MIN 1300
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#define CEC_TIM_DATA_BIT_0_LOW_MAX 1700
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#define CEC_TIM_DATA_BIT_1_LOW 600
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#define CEC_TIM_DATA_BIT_1_LOW_MIN 400
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#define CEC_TIM_DATA_BIT_1_LOW_MAX 800
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#define CEC_TIM_DATA_BIT_TOTAL 2400
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#define CEC_TIM_DATA_BIT_TOTAL_MIN 2050
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#define CEC_TIM_DATA_BIT_TOTAL_MAX 2750
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/* earliest safe time to sample the bit state */
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#define CEC_TIM_DATA_BIT_SAMPLE 850
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/* earliest time the bit is back to 1 (T7 + 50) */
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#define CEC_TIM_DATA_BIT_HIGH 1750
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/* when idle, sample once per millisecond */
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#define CEC_TIM_IDLE_SAMPLE 1000
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/* when processing the start bit, sample twice per millisecond */
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#define CEC_TIM_START_BIT_SAMPLE 500
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/* when polling for a state change, sample once every 50 micoseconds */
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#define CEC_TIM_SAMPLE 50
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#define CEC_TIM_LOW_DRIVE_ERROR (1.5 * CEC_TIM_DATA_BIT_TOTAL)
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struct cec_state {
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const char * const name;
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unsigned int usecs;
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};
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static const struct cec_state states[CEC_PIN_STATES] = {
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{ "Off", 0 },
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{ "Idle", CEC_TIM_IDLE_SAMPLE },
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{ "Tx Wait", CEC_TIM_SAMPLE },
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{ "Tx Wait for High", CEC_TIM_IDLE_SAMPLE },
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{ "Tx Start Bit Low", CEC_TIM_START_BIT_LOW },
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{ "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
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{ "Tx Data 0 Low", CEC_TIM_DATA_BIT_0_LOW },
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{ "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
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{ "Tx Data 1 Low", CEC_TIM_DATA_BIT_1_LOW },
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{ "Tx Data 1 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
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{ "Tx Data 1 Pre Sample", CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
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{ "Tx Data 1 Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
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{ "Rx Start Bit Low", CEC_TIM_SAMPLE },
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{ "Rx Start Bit High", CEC_TIM_SAMPLE },
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{ "Rx Data Sample", CEC_TIM_DATA_BIT_SAMPLE },
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{ "Rx Data Post Sample", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
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{ "Rx Data High", CEC_TIM_SAMPLE },
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{ "Rx Ack Low", CEC_TIM_DATA_BIT_0_LOW },
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{ "Rx Ack Low Post", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
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{ "Rx Ack High Post", CEC_TIM_DATA_BIT_HIGH },
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{ "Rx Ack Finish", CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
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{ "Rx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
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{ "Rx Irq", 0 },
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};
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static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
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{
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if (!force && v == pin->adap->cec_pin_is_high)
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return;
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pin->adap->cec_pin_is_high = v;
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if (atomic_read(&pin->work_pin_events) < CEC_NUM_PIN_EVENTS) {
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pin->work_pin_is_high[pin->work_pin_events_wr] = v;
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pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
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pin->work_pin_events_wr =
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(pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
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atomic_inc(&pin->work_pin_events);
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}
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wake_up_interruptible(&pin->kthread_waitq);
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}
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static bool cec_pin_read(struct cec_pin *pin)
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{
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bool v = pin->ops->read(pin->adap);
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cec_pin_update(pin, v, false);
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return v;
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}
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static void cec_pin_low(struct cec_pin *pin)
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{
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pin->ops->low(pin->adap);
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cec_pin_update(pin, false, false);
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}
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static bool cec_pin_high(struct cec_pin *pin)
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{
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pin->ops->high(pin->adap);
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return cec_pin_read(pin);
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}
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static void cec_pin_to_idle(struct cec_pin *pin)
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{
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/*
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* Reset all status fields, release the bus and
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* go to idle state.
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*/
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pin->rx_bit = pin->tx_bit = 0;
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pin->rx_msg.len = 0;
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memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
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pin->state = CEC_ST_IDLE;
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pin->ts = ns_to_ktime(0);
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}
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/*
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* Handle Transmit-related states
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*
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* Basic state changes when transmitting:
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*
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* Idle -> Tx Wait (waiting for the end of signal free time) ->
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* Tx Start Bit Low -> Tx Start Bit High ->
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*
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* Regular data bits + EOM:
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* Tx Data 0 Low -> Tx Data 0 High ->
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* or:
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* Tx Data 1 Low -> Tx Data 1 High ->
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*
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* First 4 data bits or Ack bit:
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* Tx Data 0 Low -> Tx Data 0 High ->
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* or:
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* Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample ->
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* Tx Data 1 Post Sample ->
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*
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* After the last Ack go to Idle.
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*
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* If it detects a Low Drive condition then:
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* Tx Wait For High -> Idle
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*
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* If it loses arbitration, then it switches to state Rx Data Post Sample.
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*/
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static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
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{
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bool v;
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bool is_ack_bit, ack;
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switch (pin->state) {
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case CEC_ST_TX_WAIT_FOR_HIGH:
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if (cec_pin_read(pin))
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cec_pin_to_idle(pin);
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break;
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case CEC_ST_TX_START_BIT_LOW:
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pin->state = CEC_ST_TX_START_BIT_HIGH;
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/* Generate start bit */
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cec_pin_high(pin);
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break;
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case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
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/* If the read value is 1, then all is OK */
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if (!cec_pin_read(pin)) {
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/*
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* It's 0, so someone detected an error and pulled the
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* line low for 1.5 times the nominal bit period.
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*/
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pin->tx_msg.len = 0;
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pin->work_tx_ts = ts;
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pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
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pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
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wake_up_interruptible(&pin->kthread_waitq);
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break;
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}
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if (pin->tx_nacked) {
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cec_pin_to_idle(pin);
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pin->tx_msg.len = 0;
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pin->work_tx_ts = ts;
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pin->work_tx_status = CEC_TX_STATUS_NACK;
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wake_up_interruptible(&pin->kthread_waitq);
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break;
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}
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/* fall through */
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case CEC_ST_TX_DATA_BIT_0_HIGH:
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case CEC_ST_TX_DATA_BIT_1_HIGH:
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pin->tx_bit++;
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/* fall through */
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case CEC_ST_TX_START_BIT_HIGH:
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if (pin->tx_bit / 10 >= pin->tx_msg.len) {
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cec_pin_to_idle(pin);
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pin->tx_msg.len = 0;
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pin->work_tx_ts = ts;
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pin->work_tx_status = CEC_TX_STATUS_OK;
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wake_up_interruptible(&pin->kthread_waitq);
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break;
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}
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switch (pin->tx_bit % 10) {
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default:
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v = pin->tx_msg.msg[pin->tx_bit / 10] &
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(1 << (7 - (pin->tx_bit % 10)));
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pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
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CEC_ST_TX_DATA_BIT_0_LOW;
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break;
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case 8:
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v = pin->tx_bit / 10 == pin->tx_msg.len - 1;
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pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
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CEC_ST_TX_DATA_BIT_0_LOW;
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break;
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case 9:
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pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
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break;
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}
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cec_pin_low(pin);
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break;
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case CEC_ST_TX_DATA_BIT_0_LOW:
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case CEC_ST_TX_DATA_BIT_1_LOW:
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v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
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pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
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CEC_ST_TX_DATA_BIT_0_HIGH;
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is_ack_bit = pin->tx_bit % 10 == 9;
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if (v && (pin->tx_bit < 4 || is_ack_bit))
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pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
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cec_pin_high(pin);
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break;
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case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
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/* Read the CEC value at the sample time */
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v = cec_pin_read(pin);
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is_ack_bit = pin->tx_bit % 10 == 9;
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/*
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* If v == 0 and we're within the first 4 bits
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* of the initiator, then someone else started
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* transmitting and we lost the arbitration
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* (i.e. the logical address of the other
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* transmitter has more leading 0 bits in the
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* initiator).
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*/
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if (!v && !is_ack_bit) {
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pin->tx_msg.len = 0;
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pin->work_tx_ts = ts;
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pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
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wake_up_interruptible(&pin->kthread_waitq);
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pin->rx_bit = pin->tx_bit;
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pin->tx_bit = 0;
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memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
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pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
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pin->rx_msg.msg[0] &= ~(1 << (7 - pin->rx_bit));
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pin->rx_msg.len = 0;
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pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
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pin->rx_bit++;
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break;
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}
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pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
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if (!is_ack_bit)
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break;
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/* Was the message ACKed? */
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ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
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if (!ack) {
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/*
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* Note: the CEC spec is ambiguous regarding
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* what action to take when a NACK appears
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* before the last byte of the payload was
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* transmitted: either stop transmitting
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* immediately, or wait until the last byte
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* was transmitted.
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*
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* Most CEC implementations appear to stop
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* immediately, and that's what we do here
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* as well.
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*/
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pin->tx_nacked = true;
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}
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break;
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default:
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break;
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}
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}
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/*
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* Handle Receive-related states
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*
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* Basic state changes when receiving:
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*
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* Rx Start Bit Low -> Rx Start Bit High ->
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* Regular data bits + EOM:
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* Rx Data Sample -> Rx Data Post Sample -> Rx Data High ->
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* Ack bit 0:
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* Rx Ack Low -> Rx Ack Low Post -> Rx Data High ->
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* Ack bit 1:
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* Rx Ack High Post -> Rx Data High ->
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* Ack bit 0 && EOM:
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* Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
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*/
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static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
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{
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s32 delta;
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bool v;
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bool ack;
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bool bcast, for_us;
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u8 dest;
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switch (pin->state) {
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/* Receive states */
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case CEC_ST_RX_START_BIT_LOW:
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v = cec_pin_read(pin);
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if (!v)
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break;
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pin->state = CEC_ST_RX_START_BIT_HIGH;
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delta = ktime_us_delta(ts, pin->ts);
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pin->ts = ts;
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/* Start bit low is too short, go back to idle */
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if (delta < CEC_TIM_START_BIT_LOW_MIN -
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CEC_TIM_IDLE_SAMPLE) {
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cec_pin_to_idle(pin);
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}
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break;
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case CEC_ST_RX_START_BIT_HIGH:
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v = cec_pin_read(pin);
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delta = ktime_us_delta(ts, pin->ts);
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if (v && delta > CEC_TIM_START_BIT_TOTAL_MAX -
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CEC_TIM_START_BIT_LOW_MIN) {
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cec_pin_to_idle(pin);
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break;
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}
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if (v)
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break;
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pin->state = CEC_ST_RX_DATA_SAMPLE;
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pin->ts = ts;
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pin->rx_eom = false;
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break;
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case CEC_ST_RX_DATA_SAMPLE:
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v = cec_pin_read(pin);
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pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
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switch (pin->rx_bit % 10) {
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default:
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if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
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pin->rx_msg.msg[pin->rx_bit / 10] |=
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v << (7 - (pin->rx_bit % 10));
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break;
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case 8:
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pin->rx_eom = v;
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pin->rx_msg.len = pin->rx_bit / 10 + 1;
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break;
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case 9:
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break;
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}
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pin->rx_bit++;
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break;
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case CEC_ST_RX_DATA_POST_SAMPLE:
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pin->state = CEC_ST_RX_DATA_HIGH;
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break;
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case CEC_ST_RX_DATA_HIGH:
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v = cec_pin_read(pin);
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delta = ktime_us_delta(ts, pin->ts);
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if (v && delta > CEC_TIM_DATA_BIT_TOTAL_MAX) {
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cec_pin_to_idle(pin);
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break;
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}
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if (v)
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break;
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/*
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* Go to low drive state when the total bit time is
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* too short.
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*/
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if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
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cec_pin_low(pin);
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pin->state = CEC_ST_LOW_DRIVE;
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break;
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}
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pin->ts = ts;
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if (pin->rx_bit % 10 != 9) {
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pin->state = CEC_ST_RX_DATA_SAMPLE;
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break;
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}
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dest = cec_msg_destination(&pin->rx_msg);
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bcast = dest == CEC_LOG_ADDR_BROADCAST;
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/* for_us == broadcast or directed to us */
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for_us = bcast || (pin->la_mask & (1 << dest));
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/* ACK bit value */
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ack = bcast ? 1 : !for_us;
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if (ack) {
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/* No need to write to the bus, just wait */
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pin->state = CEC_ST_RX_ACK_HIGH_POST;
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break;
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}
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cec_pin_low(pin);
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pin->state = CEC_ST_RX_ACK_LOW;
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break;
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case CEC_ST_RX_ACK_LOW:
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cec_pin_high(pin);
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pin->state = CEC_ST_RX_ACK_LOW_POST;
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break;
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case CEC_ST_RX_ACK_LOW_POST:
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case CEC_ST_RX_ACK_HIGH_POST:
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v = cec_pin_read(pin);
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if (v && pin->rx_eom) {
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pin->work_rx_msg = pin->rx_msg;
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pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
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wake_up_interruptible(&pin->kthread_waitq);
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pin->ts = ts;
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pin->state = CEC_ST_RX_ACK_FINISH;
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break;
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}
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pin->rx_bit++;
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pin->state = CEC_ST_RX_DATA_HIGH;
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break;
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case CEC_ST_RX_ACK_FINISH:
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cec_pin_to_idle(pin);
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break;
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default:
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break;
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}
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}
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/*
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* Main timer function
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*
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*/
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static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
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{
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struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
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struct cec_adapter *adap = pin->adap;
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ktime_t ts;
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s32 delta;
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ts = ktime_get();
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if (ktime_to_ns(pin->timer_ts)) {
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delta = ktime_us_delta(ts, pin->timer_ts);
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|
pin->timer_cnt++;
|
|
if (delta > 100 && pin->state != CEC_ST_IDLE) {
|
|
/* Keep track of timer overruns */
|
|
pin->timer_sum_overrun += delta;
|
|
pin->timer_100ms_overruns++;
|
|
if (delta > 300)
|
|
pin->timer_300ms_overruns++;
|
|
if (delta > pin->timer_max_overrun)
|
|
pin->timer_max_overrun = delta;
|
|
}
|
|
}
|
|
if (adap->monitor_pin_cnt)
|
|
cec_pin_read(pin);
|
|
|
|
if (pin->wait_usecs) {
|
|
/*
|
|
* If we are monitoring the pin, then we have to
|
|
* sample at regular intervals.
|
|
*/
|
|
if (pin->wait_usecs > 150) {
|
|
pin->wait_usecs -= 100;
|
|
pin->timer_ts = ktime_add_us(ts, 100);
|
|
hrtimer_forward_now(timer, ns_to_ktime(100000));
|
|
return HRTIMER_RESTART;
|
|
}
|
|
if (pin->wait_usecs > 100) {
|
|
pin->wait_usecs /= 2;
|
|
pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
|
|
hrtimer_forward_now(timer,
|
|
ns_to_ktime(pin->wait_usecs * 1000));
|
|
return HRTIMER_RESTART;
|
|
}
|
|
pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
|
|
hrtimer_forward_now(timer,
|
|
ns_to_ktime(pin->wait_usecs * 1000));
|
|
pin->wait_usecs = 0;
|
|
return HRTIMER_RESTART;
|
|
}
|
|
|
|
switch (pin->state) {
|
|
/* Transmit states */
|
|
case CEC_ST_TX_WAIT_FOR_HIGH:
|
|
case CEC_ST_TX_START_BIT_LOW:
|
|
case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
|
|
case CEC_ST_TX_DATA_BIT_0_HIGH:
|
|
case CEC_ST_TX_DATA_BIT_1_HIGH:
|
|
case CEC_ST_TX_START_BIT_HIGH:
|
|
case CEC_ST_TX_DATA_BIT_0_LOW:
|
|
case CEC_ST_TX_DATA_BIT_1_LOW:
|
|
case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
|
|
cec_pin_tx_states(pin, ts);
|
|
break;
|
|
|
|
/* Receive states */
|
|
case CEC_ST_RX_START_BIT_LOW:
|
|
case CEC_ST_RX_START_BIT_HIGH:
|
|
case CEC_ST_RX_DATA_SAMPLE:
|
|
case CEC_ST_RX_DATA_POST_SAMPLE:
|
|
case CEC_ST_RX_DATA_HIGH:
|
|
case CEC_ST_RX_ACK_LOW:
|
|
case CEC_ST_RX_ACK_LOW_POST:
|
|
case CEC_ST_RX_ACK_HIGH_POST:
|
|
case CEC_ST_RX_ACK_FINISH:
|
|
cec_pin_rx_states(pin, ts);
|
|
break;
|
|
|
|
case CEC_ST_IDLE:
|
|
case CEC_ST_TX_WAIT:
|
|
if (!cec_pin_high(pin)) {
|
|
/* Start bit, switch to receive state */
|
|
pin->ts = ts;
|
|
pin->state = CEC_ST_RX_START_BIT_LOW;
|
|
break;
|
|
}
|
|
if (ktime_to_ns(pin->ts) == 0)
|
|
pin->ts = ts;
|
|
if (pin->tx_msg.len) {
|
|
/*
|
|
* Check if the bus has been free for long enough
|
|
* so we can kick off the pending transmit.
|
|
*/
|
|
delta = ktime_us_delta(ts, pin->ts);
|
|
if (delta / CEC_TIM_DATA_BIT_TOTAL >
|
|
pin->tx_signal_free_time) {
|
|
pin->tx_nacked = false;
|
|
pin->state = CEC_ST_TX_START_BIT_LOW;
|
|
/* Generate start bit */
|
|
cec_pin_low(pin);
|
|
break;
|
|
}
|
|
if (delta / CEC_TIM_DATA_BIT_TOTAL >
|
|
pin->tx_signal_free_time - 1)
|
|
pin->state = CEC_ST_TX_WAIT;
|
|
break;
|
|
}
|
|
if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
|
|
pin->enable_irq_failed || adap->is_configuring ||
|
|
adap->is_configured || adap->monitor_all_cnt)
|
|
break;
|
|
/* Switch to interrupt mode */
|
|
atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
|
|
pin->state = CEC_ST_RX_IRQ;
|
|
wake_up_interruptible(&pin->kthread_waitq);
|
|
return HRTIMER_NORESTART;
|
|
|
|
case CEC_ST_LOW_DRIVE:
|
|
cec_pin_to_idle(pin);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
if (!adap->monitor_pin_cnt || states[pin->state].usecs <= 150) {
|
|
pin->wait_usecs = 0;
|
|
pin->timer_ts = ktime_add_us(ts, states[pin->state].usecs);
|
|
hrtimer_forward_now(timer,
|
|
ns_to_ktime(states[pin->state].usecs * 1000));
|
|
return HRTIMER_RESTART;
|
|
}
|
|
pin->wait_usecs = states[pin->state].usecs - 100;
|
|
pin->timer_ts = ktime_add_us(ts, 100);
|
|
hrtimer_forward_now(timer, ns_to_ktime(100000));
|
|
return HRTIMER_RESTART;
|
|
}
|
|
|
|
static int cec_pin_thread_func(void *_adap)
|
|
{
|
|
struct cec_adapter *adap = _adap;
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
for (;;) {
|
|
wait_event_interruptible(pin->kthread_waitq,
|
|
kthread_should_stop() ||
|
|
pin->work_rx_msg.len ||
|
|
pin->work_tx_status ||
|
|
atomic_read(&pin->work_irq_change) ||
|
|
atomic_read(&pin->work_pin_events));
|
|
|
|
if (pin->work_rx_msg.len) {
|
|
cec_received_msg_ts(adap, &pin->work_rx_msg,
|
|
ns_to_ktime(pin->work_rx_msg.rx_ts));
|
|
pin->work_rx_msg.len = 0;
|
|
}
|
|
if (pin->work_tx_status) {
|
|
unsigned int tx_status = pin->work_tx_status;
|
|
|
|
pin->work_tx_status = 0;
|
|
cec_transmit_attempt_done_ts(adap, tx_status,
|
|
pin->work_tx_ts);
|
|
}
|
|
|
|
while (atomic_read(&pin->work_pin_events)) {
|
|
unsigned int idx = pin->work_pin_events_rd;
|
|
|
|
cec_queue_pin_cec_event(adap,
|
|
pin->work_pin_is_high[idx],
|
|
pin->work_pin_ts[idx]);
|
|
pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
|
|
atomic_dec(&pin->work_pin_events);
|
|
}
|
|
|
|
switch (atomic_xchg(&pin->work_irq_change,
|
|
CEC_PIN_IRQ_UNCHANGED)) {
|
|
case CEC_PIN_IRQ_DISABLE:
|
|
pin->ops->disable_irq(adap);
|
|
cec_pin_high(pin);
|
|
cec_pin_to_idle(pin);
|
|
hrtimer_start(&pin->timer, ns_to_ktime(0),
|
|
HRTIMER_MODE_REL);
|
|
break;
|
|
case CEC_PIN_IRQ_ENABLE:
|
|
pin->enable_irq_failed = !pin->ops->enable_irq(adap);
|
|
if (pin->enable_irq_failed) {
|
|
cec_pin_to_idle(pin);
|
|
hrtimer_start(&pin->timer, ns_to_ktime(0),
|
|
HRTIMER_MODE_REL);
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (kthread_should_stop())
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
pin->enabled = enable;
|
|
if (enable) {
|
|
atomic_set(&pin->work_pin_events, 0);
|
|
pin->work_pin_events_rd = pin->work_pin_events_wr = 0;
|
|
cec_pin_read(pin);
|
|
cec_pin_to_idle(pin);
|
|
pin->tx_msg.len = 0;
|
|
pin->timer_ts = ns_to_ktime(0);
|
|
atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
|
|
pin->kthread = kthread_run(cec_pin_thread_func, adap,
|
|
"cec-pin");
|
|
if (IS_ERR(pin->kthread)) {
|
|
pr_err("cec-pin: kernel_thread() failed\n");
|
|
return PTR_ERR(pin->kthread);
|
|
}
|
|
hrtimer_start(&pin->timer, ns_to_ktime(0),
|
|
HRTIMER_MODE_REL);
|
|
} else {
|
|
if (pin->ops->disable_irq)
|
|
pin->ops->disable_irq(adap);
|
|
hrtimer_cancel(&pin->timer);
|
|
kthread_stop(pin->kthread);
|
|
cec_pin_read(pin);
|
|
cec_pin_to_idle(pin);
|
|
pin->state = CEC_ST_OFF;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
if (log_addr == CEC_LOG_ADDR_INVALID)
|
|
pin->la_mask = 0;
|
|
else
|
|
pin->la_mask |= (1 << log_addr);
|
|
return 0;
|
|
}
|
|
|
|
static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
|
|
u32 signal_free_time, struct cec_msg *msg)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
pin->tx_signal_free_time = signal_free_time;
|
|
pin->tx_msg = *msg;
|
|
pin->work_tx_status = 0;
|
|
pin->tx_bit = 0;
|
|
if (pin->state == CEC_ST_RX_IRQ) {
|
|
atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
|
|
pin->ops->disable_irq(adap);
|
|
cec_pin_high(pin);
|
|
cec_pin_to_idle(pin);
|
|
hrtimer_start(&pin->timer, ns_to_ktime(0),
|
|
HRTIMER_MODE_REL);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void cec_pin_adap_status(struct cec_adapter *adap,
|
|
struct seq_file *file)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
seq_printf(file, "state: %s\n", states[pin->state].name);
|
|
seq_printf(file, "tx_bit: %d\n", pin->tx_bit);
|
|
seq_printf(file, "rx_bit: %d\n", pin->rx_bit);
|
|
seq_printf(file, "cec pin: %d\n", pin->ops->read(adap));
|
|
seq_printf(file, "irq failed: %d\n", pin->enable_irq_failed);
|
|
if (pin->timer_100ms_overruns) {
|
|
seq_printf(file, "timer overruns > 100ms: %u of %u\n",
|
|
pin->timer_100ms_overruns, pin->timer_cnt);
|
|
seq_printf(file, "timer overruns > 300ms: %u of %u\n",
|
|
pin->timer_300ms_overruns, pin->timer_cnt);
|
|
seq_printf(file, "max timer overrun: %u usecs\n",
|
|
pin->timer_max_overrun);
|
|
seq_printf(file, "avg timer overrun: %u usecs\n",
|
|
pin->timer_sum_overrun / pin->timer_100ms_overruns);
|
|
}
|
|
pin->timer_cnt = 0;
|
|
pin->timer_100ms_overruns = 0;
|
|
pin->timer_300ms_overruns = 0;
|
|
pin->timer_max_overrun = 0;
|
|
pin->timer_sum_overrun = 0;
|
|
if (pin->ops->status)
|
|
pin->ops->status(adap, file);
|
|
}
|
|
|
|
static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
|
|
bool enable)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
pin->monitor_all = enable;
|
|
return 0;
|
|
}
|
|
|
|
static void cec_pin_adap_free(struct cec_adapter *adap)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
if (pin->ops->free)
|
|
pin->ops->free(adap);
|
|
adap->pin = NULL;
|
|
kfree(pin);
|
|
}
|
|
|
|
void cec_pin_changed(struct cec_adapter *adap, bool value)
|
|
{
|
|
struct cec_pin *pin = adap->pin;
|
|
|
|
cec_pin_update(pin, value, false);
|
|
if (!value && (adap->is_configuring || adap->is_configured ||
|
|
adap->monitor_all_cnt))
|
|
atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
|
|
}
|
|
EXPORT_SYMBOL_GPL(cec_pin_changed);
|
|
|
|
static const struct cec_adap_ops cec_pin_adap_ops = {
|
|
.adap_enable = cec_pin_adap_enable,
|
|
.adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
|
|
.adap_log_addr = cec_pin_adap_log_addr,
|
|
.adap_transmit = cec_pin_adap_transmit,
|
|
.adap_status = cec_pin_adap_status,
|
|
.adap_free = cec_pin_adap_free,
|
|
};
|
|
|
|
struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
|
|
void *priv, const char *name, u32 caps)
|
|
{
|
|
struct cec_adapter *adap;
|
|
struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
|
|
|
|
if (pin == NULL)
|
|
return ERR_PTR(-ENOMEM);
|
|
pin->ops = pin_ops;
|
|
hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
|
pin->timer.function = cec_pin_timer;
|
|
init_waitqueue_head(&pin->kthread_waitq);
|
|
|
|
adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
|
|
caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
|
|
CEC_MAX_LOG_ADDRS);
|
|
|
|
if (IS_ERR(adap)) {
|
|
kfree(pin);
|
|
return adap;
|
|
}
|
|
|
|
adap->pin = pin;
|
|
pin->adap = adap;
|
|
cec_pin_update(pin, cec_pin_high(pin), true);
|
|
return adap;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);
|