d438fabce7
Instead of removing the fault handling portion of the stack trace based on the fault handler's name, just use struct pt_regs directly. Change kfence_handle_page_fault() to take a struct pt_regs, and plumb it through to kfence_report_error() for out-of-bounds, use-after-free, or invalid access errors, where pt_regs is used to generate the stack trace. If the kernel is a DEBUG_KERNEL, also show registers for more information. Link: https://lkml.kernel.org/r/20201105092133.2075331-1-elver@google.com Signed-off-by: Marco Elver <elver@google.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Cc: Alexander Potapenko <glider@google.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: Jann Horn <jannh@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
65 lines
1.4 KiB
C
65 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* x86 KFENCE support.
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*
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* Copyright (C) 2020, Google LLC.
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*/
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#ifndef _ASM_X86_KFENCE_H
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#define _ASM_X86_KFENCE_H
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#include <linux/bug.h>
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#include <linux/kfence.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/set_memory.h>
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#include <asm/tlbflush.h>
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/* Force 4K pages for __kfence_pool. */
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static inline bool arch_kfence_init_pool(void)
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{
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unsigned long addr;
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for (addr = (unsigned long)__kfence_pool; is_kfence_address((void *)addr);
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addr += PAGE_SIZE) {
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unsigned int level;
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if (!lookup_address(addr, &level))
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return false;
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if (level != PG_LEVEL_4K)
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set_memory_4k(addr, 1);
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}
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return true;
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}
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/* Protect the given page and flush TLB. */
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static inline bool kfence_protect_page(unsigned long addr, bool protect)
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{
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unsigned int level;
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pte_t *pte = lookup_address(addr, &level);
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if (WARN_ON(!pte || level != PG_LEVEL_4K))
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return false;
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/*
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* We need to avoid IPIs, as we may get KFENCE allocations or faults
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* with interrupts disabled. Therefore, the below is best-effort, and
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* does not flush TLBs on all CPUs. We can tolerate some inaccuracy;
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* lazy fault handling takes care of faults after the page is PRESENT.
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*/
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if (protect)
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set_pte(pte, __pte(pte_val(*pte) & ~_PAGE_PRESENT));
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else
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set_pte(pte, __pte(pte_val(*pte) | _PAGE_PRESENT));
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/* Flush this CPU's TLB. */
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flush_tlb_one_kernel(addr);
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return true;
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}
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#endif /* _ASM_X86_KFENCE_H */
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