forked from Minki/linux
dbdf20db53
This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code.
We ditch the old cplb-nompu implementation, which is a good example of
why a good algorithm in a HLL is preferrable to a bad algorithm written in
assembly. Rather than try to construct a table of all posible CPLBs and
search it, we just create a (smaller) table of memory regions and
their attributes. Some of the data structures are now unified for both
the mpu and nompu cases. A lot of needless complexity in cplbinit.c is
removed.
Further optimizations:
* compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving
these registers on the stack when entering a CPLB exception.
* lose cli/nop/nop/sti sequences for some workarounds - these don't
* make
sense in an exception context
Additional code unification should be possible after this.
[Mike Frysinger <vapier.adi@gmail.com>:
- convert CPP if statements to C if statements
- remove redundant statements
- use a do...while loop rather than a for loop to get slightly better
optimization and to avoid gcc "may be used uninitialized" warnings ...
we know that the [id]cplb_nr_bounds variables will never be 0, so this
is OK
- the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten,
we can punt it
- add some BUG_ON() checks to make sure we dont overflow the small
cplb_bounds array
- add i/d cplb entries for the bootrom because there is functions/data in
there we want to access
- we do not need a NULL trailing entry as any time we access the bounds
arrays, we use the nr_bounds variable
]
Signed-off-by: Michael McTernan <mmcternan@airvana.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
/*
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* Copyright 2004-2007 Analog Devices Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/cpu.h>
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#include <asm/cacheflush.h>
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#include <asm/blackfin.h>
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#include <asm/cplb.h>
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#include <asm/cplbinit.h>
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#if defined(CONFIG_BFIN_ICACHE)
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void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
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{
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unsigned long ctrl;
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int i;
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SSYNC();
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for (i = 0; i < MAX_CPLBS; i++) {
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bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr);
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bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data);
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}
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ctrl = bfin_read_IMEM_CONTROL();
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ctrl |= IMC | ENICPLB;
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bfin_write_IMEM_CONTROL(ctrl);
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SSYNC();
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}
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#endif
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#if defined(CONFIG_BFIN_DCACHE)
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void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
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{
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unsigned long ctrl;
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int i;
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SSYNC();
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for (i = 0; i < MAX_CPLBS; i++) {
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bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr);
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bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data);
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}
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ctrl = bfin_read_DMEM_CONTROL();
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ctrl |= DMEM_CNTR;
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bfin_write_DMEM_CONTROL(ctrl);
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SSYNC();
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}
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#endif
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