forked from Minki/linux
9ff49ec75e
All the UARTs are connected to clock gates; now that our clock driver is able to handle them, make the switch. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
112 lines
2.4 KiB
Plaintext
112 lines
2.4 KiB
Plaintext
/*
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* Copyright 2012 Stefan Roese
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* Stefan Roese <sr@denx.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "sunxi.dtsi"
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/ {
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memory {
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reg = <0x40000000 0x80000000>;
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};
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soc {
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pio: pinctrl@01c20800 {
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compatible = "allwinner,sun4i-a10-pinctrl";
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reg = <0x01c20800 0x400>;
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gpio-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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#gpio-cells = <3>;
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uart0_pins_a: uart0@0 {
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allwinner,pins = "PB22", "PB23";
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allwinner,function = "uart0";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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uart0_pins_b: uart0@1 {
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allwinner,pins = "PF2", "PF4";
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allwinner,function = "uart0";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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uart1_pins_a: uart1@0 {
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allwinner,pins = "PA10", "PA11";
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allwinner,function = "uart1";
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allwinner,drive = <0>;
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allwinner,pull = <0>;
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};
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};
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uart0: serial@01c28000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28000 0x400>;
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interrupts = <1>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb1_gates 16>;
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status = "disabled";
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};
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uart2: serial@01c28800 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28800 0x400>;
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interrupts = <3>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb1_gates 18>;
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status = "disabled";
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};
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uart4: serial@01c29000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c29000 0x400>;
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interrupts = <17>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb1_gates 20>;
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status = "disabled";
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};
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uart5: serial@01c29400 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c29400 0x400>;
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interrupts = <18>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb1_gates 21>;
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status = "disabled";
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};
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uart6: serial@01c29800 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c29800 0x400>;
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interrupts = <19>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb1_gates 22>;
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status = "disabled";
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};
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uart7: serial@01c29c00 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c29c00 0x400>;
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interrupts = <20>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb1_gates 23>;
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status = "disabled";
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};
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};
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};
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