forked from Minki/linux
9fd99f4f3f
The resume helpers wait for a vblank to occurre hence IRQ need to be enabled. This avoids a warning as follows during resume: WARNING: CPU: 0 PID: 314 at drivers/gpu/drm/drm_atomic_helper.c:1249 drm_atomic_helper_wait_for_vblanks.part.1+0x284/0x288 [CRTC:28:crtc-0] vblank wait timed out Signed-off-by: Stefan Agner <stefan@agner.ch>
408 lines
9.7 KiB
C
408 lines
9.7 KiB
C
/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* Freescale DCU drm device driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/console.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include "fsl_dcu_drm_crtc.h"
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#include "fsl_dcu_drm_drv.h"
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#include "fsl_tcon.h"
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static int legacyfb_depth = 24;
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module_param(legacyfb_depth, int, 0444);
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static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
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return true;
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return false;
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}
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static const struct regmap_config fsl_dcu_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.volatile_reg = fsl_dcu_drm_is_volatile_reg,
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};
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static void fsl_dcu_irq_uninstall(struct drm_device *dev)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
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regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
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}
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static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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int ret;
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ret = fsl_dcu_drm_modeset_init(fsl_dev);
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if (ret < 0) {
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dev_err(dev->dev, "failed to initialize mode setting\n");
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return ret;
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}
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ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
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if (ret < 0) {
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dev_err(dev->dev, "failed to initialize vblank\n");
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goto done;
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}
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ret = drm_irq_install(dev, fsl_dev->irq);
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if (ret < 0) {
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dev_err(dev->dev, "failed to install IRQ handler\n");
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goto done;
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}
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if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
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legacyfb_depth != 32) {
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dev_warn(dev->dev,
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"Invalid legacyfb_depth. Defaulting to 24bpp\n");
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legacyfb_depth = 24;
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}
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fsl_dev->fbdev = drm_fbdev_cma_init(dev, legacyfb_depth, 1);
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if (IS_ERR(fsl_dev->fbdev)) {
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ret = PTR_ERR(fsl_dev->fbdev);
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fsl_dev->fbdev = NULL;
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goto done;
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}
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return 0;
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done:
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drm_kms_helper_poll_fini(dev);
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if (fsl_dev->fbdev)
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drm_fbdev_cma_fini(fsl_dev->fbdev);
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drm_mode_config_cleanup(dev);
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drm_irq_uninstall(dev);
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dev->dev_private = NULL;
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return ret;
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}
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static void fsl_dcu_unload(struct drm_device *dev)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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drm_atomic_helper_shutdown(dev);
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drm_kms_helper_poll_fini(dev);
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if (fsl_dev->fbdev)
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drm_fbdev_cma_fini(fsl_dev->fbdev);
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drm_mode_config_cleanup(dev);
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drm_irq_uninstall(dev);
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dev->dev_private = NULL;
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}
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static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
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{
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struct drm_device *dev = arg;
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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unsigned int int_status;
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int ret;
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ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
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if (ret) {
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dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
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return IRQ_NONE;
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}
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if (int_status & DCU_INT_STATUS_VBLANK)
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drm_handle_vblank(dev, 0);
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regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
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return IRQ_HANDLED;
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}
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static void fsl_dcu_drm_lastclose(struct drm_device *dev)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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drm_fbdev_cma_restore_mode(fsl_dev->fbdev);
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}
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DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);
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static struct drm_driver fsl_dcu_drm_driver = {
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.driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
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| DRIVER_PRIME | DRIVER_ATOMIC,
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.lastclose = fsl_dcu_drm_lastclose,
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.load = fsl_dcu_load,
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.unload = fsl_dcu_unload,
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.irq_handler = fsl_dcu_drm_irq,
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.irq_preinstall = fsl_dcu_irq_uninstall,
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.irq_uninstall = fsl_dcu_irq_uninstall,
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.gem_free_object_unlocked = drm_gem_cma_free_object,
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.gem_vm_ops = &drm_gem_cma_vm_ops,
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_import = drm_gem_prime_import,
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.gem_prime_export = drm_gem_prime_export,
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.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
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.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
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.gem_prime_vmap = drm_gem_cma_prime_vmap,
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.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
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.gem_prime_mmap = drm_gem_cma_prime_mmap,
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.dumb_create = drm_gem_cma_dumb_create,
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.fops = &fsl_dcu_drm_fops,
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.name = "fsl-dcu-drm",
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.desc = "Freescale DCU DRM",
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.date = "20160425",
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.major = 1,
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.minor = 1,
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};
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#ifdef CONFIG_PM_SLEEP
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static int fsl_dcu_drm_pm_suspend(struct device *dev)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
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if (!fsl_dev)
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return 0;
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disable_irq(fsl_dev->irq);
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drm_kms_helper_poll_disable(fsl_dev->drm);
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console_lock();
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drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 1);
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console_unlock();
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fsl_dev->state = drm_atomic_helper_suspend(fsl_dev->drm);
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if (IS_ERR(fsl_dev->state)) {
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console_lock();
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drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0);
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console_unlock();
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drm_kms_helper_poll_enable(fsl_dev->drm);
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enable_irq(fsl_dev->irq);
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return PTR_ERR(fsl_dev->state);
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}
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clk_disable_unprepare(fsl_dev->clk);
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return 0;
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}
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static int fsl_dcu_drm_pm_resume(struct device *dev)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
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int ret;
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if (!fsl_dev)
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return 0;
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ret = clk_prepare_enable(fsl_dev->clk);
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if (ret < 0) {
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dev_err(dev, "failed to enable dcu clk\n");
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return ret;
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}
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if (fsl_dev->tcon)
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fsl_tcon_bypass_enable(fsl_dev->tcon);
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fsl_dcu_drm_init_planes(fsl_dev->drm);
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enable_irq(fsl_dev->irq);
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drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state);
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console_lock();
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drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0);
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console_unlock();
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drm_kms_helper_poll_enable(fsl_dev->drm);
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return 0;
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}
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#endif
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static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
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};
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static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
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.name = "ls1021a",
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.total_layer = 16,
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.max_layer = 4,
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.layer_regs = LS1021A_LAYER_REG_NUM,
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};
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static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
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.name = "vf610",
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.total_layer = 64,
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.max_layer = 6,
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.layer_regs = VF610_LAYER_REG_NUM,
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};
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static const struct of_device_id fsl_dcu_of_match[] = {
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{
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.compatible = "fsl,ls1021a-dcu",
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.data = &fsl_dcu_ls1021a_data,
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}, {
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.compatible = "fsl,vf610-dcu",
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.data = &fsl_dcu_vf610_data,
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}, {
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},
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};
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MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
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static int fsl_dcu_drm_probe(struct platform_device *pdev)
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{
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struct fsl_dcu_drm_device *fsl_dev;
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struct drm_device *drm;
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struct device *dev = &pdev->dev;
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struct resource *res;
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void __iomem *base;
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struct drm_driver *driver = &fsl_dcu_drm_driver;
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struct clk *pix_clk_in;
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char pix_clk_name[32];
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const char *pix_clk_in_name;
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const struct of_device_id *id;
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int ret;
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u8 div_ratio_shift = 0;
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fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
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if (!fsl_dev)
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return -ENOMEM;
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id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
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if (!id)
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return -ENODEV;
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fsl_dev->soc = id->data;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base)) {
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ret = PTR_ERR(base);
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return ret;
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}
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fsl_dev->irq = platform_get_irq(pdev, 0);
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if (fsl_dev->irq < 0) {
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dev_err(dev, "failed to get irq\n");
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return fsl_dev->irq;
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}
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fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
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&fsl_dcu_regmap_config);
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if (IS_ERR(fsl_dev->regmap)) {
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dev_err(dev, "regmap init failed\n");
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return PTR_ERR(fsl_dev->regmap);
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}
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fsl_dev->clk = devm_clk_get(dev, "dcu");
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if (IS_ERR(fsl_dev->clk)) {
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dev_err(dev, "failed to get dcu clock\n");
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return PTR_ERR(fsl_dev->clk);
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}
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ret = clk_prepare_enable(fsl_dev->clk);
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if (ret < 0) {
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dev_err(dev, "failed to enable dcu clk\n");
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return ret;
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}
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pix_clk_in = devm_clk_get(dev, "pix");
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if (IS_ERR(pix_clk_in)) {
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/* legancy binding, use dcu clock as pixel clock input */
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pix_clk_in = fsl_dev->clk;
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}
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if (of_property_read_bool(dev->of_node, "big-endian"))
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div_ratio_shift = 24;
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pix_clk_in_name = __clk_get_name(pix_clk_in);
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snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
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fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
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pix_clk_in_name, 0, base + DCU_DIV_RATIO,
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div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
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if (IS_ERR(fsl_dev->pix_clk)) {
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dev_err(dev, "failed to register pix clk\n");
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ret = PTR_ERR(fsl_dev->pix_clk);
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goto disable_clk;
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}
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fsl_dev->tcon = fsl_tcon_init(dev);
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drm = drm_dev_alloc(driver, dev);
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if (IS_ERR(drm)) {
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ret = PTR_ERR(drm);
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goto unregister_pix_clk;
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}
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fsl_dev->dev = dev;
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fsl_dev->drm = drm;
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fsl_dev->np = dev->of_node;
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drm->dev_private = fsl_dev;
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dev_set_drvdata(dev, fsl_dev);
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ret = drm_dev_register(drm, 0);
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if (ret < 0)
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goto unref;
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return 0;
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unref:
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drm_dev_unref(drm);
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unregister_pix_clk:
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clk_unregister(fsl_dev->pix_clk);
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disable_clk:
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clk_disable_unprepare(fsl_dev->clk);
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return ret;
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}
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static int fsl_dcu_drm_remove(struct platform_device *pdev)
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{
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struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
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drm_dev_unregister(fsl_dev->drm);
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drm_dev_unref(fsl_dev->drm);
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clk_disable_unprepare(fsl_dev->clk);
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clk_unregister(fsl_dev->pix_clk);
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return 0;
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}
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static struct platform_driver fsl_dcu_drm_platform_driver = {
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.probe = fsl_dcu_drm_probe,
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.remove = fsl_dcu_drm_remove,
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.driver = {
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.name = "fsl-dcu",
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.pm = &fsl_dcu_drm_pm_ops,
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.of_match_table = fsl_dcu_of_match,
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},
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};
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module_platform_driver(fsl_dcu_drm_platform_driver);
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MODULE_DESCRIPTION("Freescale DCU DRM Driver");
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MODULE_LICENSE("GPL");
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