forked from Minki/linux
ef24ba7091
NO_IRQ has been == 0 on powerpc for just over ten years (since commit
0ebfff1491
("[POWERPC] Add new interrupt mapping core and change
platforms to use it")). It's also 0 on most other arches.
Although it's fairly harmless, every now and then it causes confusion
when a driver is built on powerpc and another arch which doesn't define
NO_IRQ. There's at least 6 definitions of NO_IRQ in drivers/, at least
some of which are to work around that problem.
So we'd like to remove it. This is fairly trivial in the arch code, we
just convert:
if (irq == NO_IRQ) to if (!irq)
if (irq != NO_IRQ) to if (irq)
irq = NO_IRQ; to irq = 0;
return NO_IRQ; to return 0;
And a few other odd cases as well.
At least for now we keep the #define NO_IRQ, because there is driver
code that uses NO_IRQ and the fixes to remove those will go via other
trees.
Note we also change some occurrences in PPC sound drivers, drivers/ps3,
and drivers/macintosh.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
220 lines
4.8 KiB
C
220 lines
4.8 KiB
C
/*
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* Board setup routines for the Motorola/Emerson MVME5100.
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*
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* Copyright 2013 CSC Australia Pty. Ltd.
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*
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* Based on earlier code by:
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*
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* Matt Porter, MontaVista Software Inc.
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* Copyright 2001 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Author: Stephen Chivers <schivers@csc.com>
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*
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*/
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#include <linux/of_platform.h>
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#include <asm/i8259.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <asm/prom.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#define HAWK_MPIC_SIZE 0x00040000U
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#define MVME5100_PCI_MEM_OFFSET 0x00000000
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/* Board register addresses. */
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#define BOARD_STATUS_REG 0xfef88080
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#define BOARD_MODFAIL_REG 0xfef88090
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#define BOARD_MODRST_REG 0xfef880a0
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#define BOARD_TBEN_REG 0xfef880c0
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#define BOARD_SW_READ_REG 0xfef880e0
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#define BOARD_GEO_ADDR_REG 0xfef880e8
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#define BOARD_EXT_FEATURE1_REG 0xfef880f0
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#define BOARD_EXT_FEATURE2_REG 0xfef88100
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static phys_addr_t pci_membase;
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static u_char *restart;
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static void mvme5100_8259_cascade(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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unsigned int cascade_irq = i8259_irq();
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if (cascade_irq)
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generic_handle_irq(cascade_irq);
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chip->irq_eoi(&desc->irq_data);
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}
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static void __init mvme5100_pic_init(void)
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{
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struct mpic *mpic;
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struct device_node *np;
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struct device_node *cp = NULL;
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unsigned int cirq;
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unsigned long intack = 0;
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const u32 *prop = NULL;
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np = of_find_node_by_type(NULL, "open-pic");
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if (!np) {
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pr_err("Could not find open-pic node\n");
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return;
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}
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mpic = mpic_alloc(np, pci_membase, 0, 16, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_assign_isu(mpic, 0, pci_membase + 0x10000);
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mpic_init(mpic);
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cp = of_find_compatible_node(NULL, NULL, "chrp,iic");
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if (cp == NULL) {
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pr_warn("mvme5100_pic_init: couldn't find i8259\n");
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return;
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}
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cirq = irq_of_parse_and_map(cp, 0);
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if (!cirq) {
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pr_warn("mvme5100_pic_init: no cascade interrupt?\n");
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return;
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}
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np = of_find_compatible_node(NULL, "pci", "mpc10x-pci");
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if (np) {
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prop = of_get_property(np, "8259-interrupt-acknowledge", NULL);
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if (prop)
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intack = prop[0];
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of_node_put(np);
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}
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if (intack)
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pr_debug("mvme5100_pic_init: PCI 8259 intack at 0x%016lx\n",
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intack);
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i8259_init(cp, intack);
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of_node_put(cp);
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irq_set_chained_handler(cirq, mvme5100_8259_cascade);
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}
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static int __init mvme5100_add_bridge(struct device_node *dev)
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{
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const int *bus_range;
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int len;
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struct pci_controller *hose;
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unsigned short devid;
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pr_info("Adding PCI host bridge %s\n", dev->full_name);
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bus_range = of_get_property(dev, "bus-range", &len);
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hose = pcibios_alloc_controller(dev);
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if (hose == NULL)
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return -ENOMEM;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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setup_indirect_pci(hose, 0xfe000cf8, 0xfe000cfc, 0);
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pci_process_bridge_OF_ranges(hose, dev, 1);
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early_read_config_word(hose, 0, 0, PCI_DEVICE_ID, &devid);
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if (devid != PCI_DEVICE_ID_MOTOROLA_HAWK) {
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pr_err("HAWK PHB not present?\n");
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return 0;
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}
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early_read_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase);
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if (pci_membase == 0) {
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pr_err("HAWK PHB mibar not correctly set?\n");
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return 0;
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}
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pr_info("mvme5100_pic_init: pci_membase: %x\n", pci_membase);
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return 0;
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}
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static const struct of_device_id mvme5100_of_bus_ids[] __initconst = {
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{ .compatible = "hawk-bridge", },
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{},
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};
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/*
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* Setup the architecture
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*/
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static void __init mvme5100_setup_arch(void)
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{
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struct device_node *np;
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if (ppc_md.progress)
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ppc_md.progress("mvme5100_setup_arch()", 0);
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for_each_compatible_node(np, "pci", "hawk-pci")
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mvme5100_add_bridge(np);
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restart = ioremap(BOARD_MODRST_REG, 4);
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}
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static void mvme5100_show_cpuinfo(struct seq_file *m)
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{
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seq_puts(m, "Vendor\t\t: Motorola/Emerson\n");
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seq_puts(m, "Machine\t\t: MVME5100\n");
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}
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static void __noreturn mvme5100_restart(char *cmd)
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{
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local_irq_disable();
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mtmsr(mfmsr() | MSR_IP);
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out_8((u_char *) restart, 0x01);
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while (1)
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;
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mvme5100_probe(void)
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{
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return of_machine_is_compatible("MVME5100");
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}
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static int __init probe_of_platform_devices(void)
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{
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of_platform_bus_probe(NULL, mvme5100_of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(mvme5100, probe_of_platform_devices);
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define_machine(mvme5100) {
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.name = "MVME5100",
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.probe = mvme5100_probe,
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.setup_arch = mvme5100_setup_arch,
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.init_IRQ = mvme5100_pic_init,
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.show_cpuinfo = mvme5100_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.restart = mvme5100_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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