forked from Minki/linux
7672150301
We have special logic to suppress MTE tag check fault reporting, based on a global `mte_report_once` and `reported` variables. These can be used to suppress calling kasan_report() when taking a tag check fault, but do not prevent taking the fault in the first place, nor does they affect the way we disable tag checks upon taking a fault. The core KASAN code already defaults to reporting a single fault, and has a `multi_shot` control to permit reporting multiple faults. The only place we transiently alter `mte_report_once` is in lib/test_kasan.c, where we also the `multi_shot` state as the same time. Thus `mte_report_once` and `reported` are redundant, and can be removed. When a tag check fault is taken, tag checking will be disabled by `do_tag_recovery` and must be explicitly re-enabled if desired. The test code does this by calling kasan_enable_tagging_sync(). This patch removes the redundant mte_report_once() logic and associated variables. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Alexander Potapenko <glider@google.com> Cc: Andrey Konovalov <andreyknvl@gmail.com> Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: Will Deacon <will@kernel.org> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com> Tested-by: Andrey Konovalov <andreyknvl@gmail.com> Link: https://lore.kernel.org/r/20210714143843.56537-4-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
935 lines
26 KiB
C
935 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/mm/fault.c
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*
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* Copyright (C) 1995 Linus Torvalds
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* Copyright (C) 1995-2004 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/acpi.h>
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#include <linux/bitfield.h>
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#include <linux/extable.h>
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#include <linux/kfence.h>
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#include <linux/signal.h>
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#include <linux/mm.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/kasan.h>
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#include <linux/kprobes.h>
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#include <linux/uaccess.h>
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#include <linux/page-flags.h>
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#include <linux/sched/signal.h>
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#include <linux/sched/debug.h>
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#include <linux/highmem.h>
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#include <linux/perf_event.h>
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#include <linux/preempt.h>
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#include <linux/hugetlb.h>
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#include <asm/acpi.h>
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#include <asm/bug.h>
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#include <asm/cmpxchg.h>
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#include <asm/cpufeature.h>
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#include <asm/exception.h>
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#include <asm/daifflags.h>
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#include <asm/debug-monitors.h>
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#include <asm/esr.h>
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#include <asm/kprobes.h>
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#include <asm/mte.h>
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#include <asm/processor.h>
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#include <asm/sysreg.h>
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#include <asm/system_misc.h>
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#include <asm/tlbflush.h>
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#include <asm/traps.h>
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struct fault_info {
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int (*fn)(unsigned long far, unsigned int esr,
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struct pt_regs *regs);
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int sig;
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int code;
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const char *name;
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};
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static const struct fault_info fault_info[];
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static struct fault_info debug_fault_info[];
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static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
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{
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return fault_info + (esr & ESR_ELx_FSC);
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}
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static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr)
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{
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return debug_fault_info + DBG_ESR_EVT(esr);
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}
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static void data_abort_decode(unsigned int esr)
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{
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pr_alert("Data abort info:\n");
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if (esr & ESR_ELx_ISV) {
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pr_alert(" Access size = %u byte(s)\n",
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1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
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pr_alert(" SSE = %lu, SRT = %lu\n",
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(esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
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(esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
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pr_alert(" SF = %lu, AR = %lu\n",
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(esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
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(esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
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} else {
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pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK);
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}
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pr_alert(" CM = %lu, WnR = %lu\n",
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(esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
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(esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
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}
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static void mem_abort_decode(unsigned int esr)
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{
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pr_alert("Mem abort info:\n");
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pr_alert(" ESR = 0x%08x\n", esr);
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pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
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ESR_ELx_EC(esr), esr_get_class_string(esr),
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(esr & ESR_ELx_IL) ? 32 : 16);
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pr_alert(" SET = %lu, FnV = %lu\n",
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(esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
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(esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
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pr_alert(" EA = %lu, S1PTW = %lu\n",
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(esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
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(esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
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pr_alert(" FSC = 0x%02x: %s\n", (esr & ESR_ELx_FSC),
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esr_to_fault_info(esr)->name);
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if (esr_is_data_abort(esr))
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data_abort_decode(esr);
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}
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static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
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{
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/* Either init_pg_dir or swapper_pg_dir */
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if (mm == &init_mm)
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return __pa_symbol(mm->pgd);
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return (unsigned long)virt_to_phys(mm->pgd);
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}
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/*
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* Dump out the page tables associated with 'addr' in the currently active mm.
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*/
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static void show_pte(unsigned long addr)
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{
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struct mm_struct *mm;
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pgd_t *pgdp;
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pgd_t pgd;
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if (is_ttbr0_addr(addr)) {
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/* TTBR0 */
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mm = current->active_mm;
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if (mm == &init_mm) {
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pr_alert("[%016lx] user address but active_mm is swapper\n",
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addr);
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return;
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}
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} else if (is_ttbr1_addr(addr)) {
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/* TTBR1 */
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mm = &init_mm;
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} else {
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pr_alert("[%016lx] address between user and kernel address ranges\n",
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addr);
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return;
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}
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pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
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mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
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vabits_actual, mm_to_pgd_phys(mm));
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pgdp = pgd_offset(mm, addr);
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pgd = READ_ONCE(*pgdp);
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pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
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do {
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p4d_t *p4dp, p4d;
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pud_t *pudp, pud;
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pmd_t *pmdp, pmd;
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pte_t *ptep, pte;
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if (pgd_none(pgd) || pgd_bad(pgd))
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break;
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p4dp = p4d_offset(pgdp, addr);
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p4d = READ_ONCE(*p4dp);
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pr_cont(", p4d=%016llx", p4d_val(p4d));
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if (p4d_none(p4d) || p4d_bad(p4d))
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break;
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pudp = pud_offset(p4dp, addr);
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pud = READ_ONCE(*pudp);
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pr_cont(", pud=%016llx", pud_val(pud));
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if (pud_none(pud) || pud_bad(pud))
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break;
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pmdp = pmd_offset(pudp, addr);
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pmd = READ_ONCE(*pmdp);
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pr_cont(", pmd=%016llx", pmd_val(pmd));
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if (pmd_none(pmd) || pmd_bad(pmd))
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break;
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ptep = pte_offset_map(pmdp, addr);
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pte = READ_ONCE(*ptep);
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pr_cont(", pte=%016llx", pte_val(pte));
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pte_unmap(ptep);
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} while(0);
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pr_cont("\n");
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}
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/*
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* This function sets the access flags (dirty, accessed), as well as write
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* permission, and only to a more permissive setting.
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*
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* It needs to cope with hardware update of the accessed/dirty state by other
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* agents in the system and can safely skip the __sync_icache_dcache() call as,
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* like set_pte_at(), the PTE is never changed from no-exec to exec here.
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*
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* Returns whether or not the PTE actually changed.
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*/
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int ptep_set_access_flags(struct vm_area_struct *vma,
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unsigned long address, pte_t *ptep,
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pte_t entry, int dirty)
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{
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pteval_t old_pteval, pteval;
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pte_t pte = READ_ONCE(*ptep);
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if (pte_same(pte, entry))
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return 0;
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/* only preserve the access flags and write permission */
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pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
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/*
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* Setting the flags must be done atomically to avoid racing with the
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* hardware update of the access/dirty state. The PTE_RDONLY bit must
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* be set to the most permissive (lowest value) of *ptep and entry
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* (calculated as: a & b == ~(~a | ~b)).
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*/
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pte_val(entry) ^= PTE_RDONLY;
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pteval = pte_val(pte);
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do {
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old_pteval = pteval;
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pteval ^= PTE_RDONLY;
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pteval |= pte_val(entry);
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pteval ^= PTE_RDONLY;
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pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
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} while (pteval != old_pteval);
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/* Invalidate a stale read-only entry */
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if (dirty)
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flush_tlb_page(vma, address);
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return 1;
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}
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static bool is_el1_instruction_abort(unsigned int esr)
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{
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return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
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}
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static bool is_el1_data_abort(unsigned int esr)
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{
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return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
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}
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static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
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struct pt_regs *regs)
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{
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unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
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if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
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return false;
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if (fsc_type == ESR_ELx_FSC_PERM)
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return true;
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if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
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return fsc_type == ESR_ELx_FSC_FAULT &&
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(regs->pstate & PSR_PAN_BIT);
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return false;
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}
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static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
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unsigned int esr,
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struct pt_regs *regs)
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{
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unsigned long flags;
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u64 par, dfsc;
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if (!is_el1_data_abort(esr) ||
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(esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT)
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return false;
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local_irq_save(flags);
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asm volatile("at s1e1r, %0" :: "r" (addr));
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isb();
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par = read_sysreg_par();
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local_irq_restore(flags);
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/*
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* If we now have a valid translation, treat the translation fault as
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* spurious.
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*/
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if (!(par & SYS_PAR_EL1_F))
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return true;
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/*
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* If we got a different type of fault from the AT instruction,
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* treat the translation fault as spurious.
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*/
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dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
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return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT;
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}
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static void die_kernel_fault(const char *msg, unsigned long addr,
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unsigned int esr, struct pt_regs *regs)
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{
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bust_spinlocks(1);
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pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
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addr);
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mem_abort_decode(esr);
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show_pte(addr);
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die("Oops", regs, esr);
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bust_spinlocks(0);
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do_exit(SIGKILL);
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}
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#ifdef CONFIG_KASAN_HW_TAGS
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static void report_tag_fault(unsigned long addr, unsigned int esr,
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struct pt_regs *regs)
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{
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/*
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* SAS bits aren't set for all faults reported in EL1, so we can't
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* find out access size.
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*/
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bool is_write = !!(esr & ESR_ELx_WNR);
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kasan_report(addr, 0, is_write, regs->pc);
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}
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#else
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/* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
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static inline void report_tag_fault(unsigned long addr, unsigned int esr,
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struct pt_regs *regs) { }
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#endif
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static void do_tag_recovery(unsigned long addr, unsigned int esr,
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struct pt_regs *regs)
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{
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report_tag_fault(addr, esr, regs);
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/*
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* Disable MTE Tag Checking on the local CPU for the current EL.
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* It will be done lazily on the other CPUs when they will hit a
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* tag fault.
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*/
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sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE);
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isb();
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}
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static bool is_el1_mte_sync_tag_check_fault(unsigned int esr)
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{
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unsigned int fsc = esr & ESR_ELx_FSC;
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if (!is_el1_data_abort(esr))
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return false;
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if (fsc == ESR_ELx_FSC_MTE)
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return true;
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return false;
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}
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static void __do_kernel_fault(unsigned long addr, unsigned int esr,
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struct pt_regs *regs)
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{
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const char *msg;
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/*
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* Are we prepared to handle this kernel fault?
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* We are almost certainly not prepared to handle instruction faults.
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*/
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if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
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return;
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if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
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"Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
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return;
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if (is_el1_mte_sync_tag_check_fault(esr)) {
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do_tag_recovery(addr, esr, regs);
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return;
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}
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if (is_el1_permission_fault(addr, esr, regs)) {
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if (esr & ESR_ELx_WNR)
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msg = "write to read-only memory";
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else if (is_el1_instruction_abort(esr))
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msg = "execute from non-executable memory";
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else
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msg = "read from unreadable memory";
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} else if (addr < PAGE_SIZE) {
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msg = "NULL pointer dereference";
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} else {
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if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
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return;
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msg = "paging request";
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}
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die_kernel_fault(msg, addr, esr, regs);
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}
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static void set_thread_esr(unsigned long address, unsigned int esr)
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{
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current->thread.fault_address = address;
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/*
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* If the faulting address is in the kernel, we must sanitize the ESR.
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* From userspace's point of view, kernel-only mappings don't exist
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* at all, so we report them as level 0 translation faults.
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* (This is not quite the way that "no mapping there at all" behaves:
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* an alignment fault not caused by the memory type would take
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* precedence over translation fault for a real access to empty
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* space. Unfortunately we can't easily distinguish "alignment fault
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* not caused by memory type" from "alignment fault caused by memory
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* type", so we ignore this wrinkle and just return the translation
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* fault.)
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*/
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if (!is_ttbr0_addr(current->thread.fault_address)) {
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switch (ESR_ELx_EC(esr)) {
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case ESR_ELx_EC_DABT_LOW:
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/*
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* These bits provide only information about the
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* faulting instruction, which userspace knows already.
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* We explicitly clear bits which are architecturally
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* RES0 in case they are given meanings in future.
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* We always report the ESR as if the fault was taken
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* to EL1 and so ISV and the bits in ISS[23:14] are
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* clear. (In fact it always will be a fault to EL1.)
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*/
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esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
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ESR_ELx_CM | ESR_ELx_WNR;
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esr |= ESR_ELx_FSC_FAULT;
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break;
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case ESR_ELx_EC_IABT_LOW:
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/*
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* Claim a level 0 translation fault.
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* All other bits are architecturally RES0 for faults
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* reported with that DFSC value, so we clear them.
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*/
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esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
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esr |= ESR_ELx_FSC_FAULT;
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break;
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default:
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/*
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* This should never happen (entry.S only brings us
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* into this code for insn and data aborts from a lower
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* exception level). Fail safe by not providing an ESR
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* context record at all.
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*/
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WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr);
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esr = 0;
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break;
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}
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}
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current->thread.fault_code = esr;
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}
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static void do_bad_area(unsigned long far, unsigned int esr,
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struct pt_regs *regs)
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{
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unsigned long addr = untagged_addr(far);
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|
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/*
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* If we are in kernel mode at this point, we have no context to
|
|
* handle this fault with.
|
|
*/
|
|
if (user_mode(regs)) {
|
|
const struct fault_info *inf = esr_to_fault_info(esr);
|
|
|
|
set_thread_esr(addr, esr);
|
|
arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
|
|
} else {
|
|
__do_kernel_fault(addr, esr, regs);
|
|
}
|
|
}
|
|
|
|
#define VM_FAULT_BADMAP 0x010000
|
|
#define VM_FAULT_BADACCESS 0x020000
|
|
|
|
static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr,
|
|
unsigned int mm_flags, unsigned long vm_flags,
|
|
struct pt_regs *regs)
|
|
{
|
|
struct vm_area_struct *vma = find_vma(mm, addr);
|
|
|
|
if (unlikely(!vma))
|
|
return VM_FAULT_BADMAP;
|
|
|
|
/*
|
|
* Ok, we have a good vm_area for this memory access, so we can handle
|
|
* it.
|
|
*/
|
|
if (unlikely(vma->vm_start > addr)) {
|
|
if (!(vma->vm_flags & VM_GROWSDOWN))
|
|
return VM_FAULT_BADMAP;
|
|
if (expand_stack(vma, addr))
|
|
return VM_FAULT_BADMAP;
|
|
}
|
|
|
|
/*
|
|
* Check that the permissions on the VMA allow for the fault which
|
|
* occurred.
|
|
*/
|
|
if (!(vma->vm_flags & vm_flags))
|
|
return VM_FAULT_BADACCESS;
|
|
return handle_mm_fault(vma, addr, mm_flags, regs);
|
|
}
|
|
|
|
static bool is_el0_instruction_abort(unsigned int esr)
|
|
{
|
|
return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
|
|
}
|
|
|
|
/*
|
|
* Note: not valid for EL1 DC IVAC, but we never use that such that it
|
|
* should fault. EL0 cannot issue DC IVAC (undef).
|
|
*/
|
|
static bool is_write_abort(unsigned int esr)
|
|
{
|
|
return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
|
|
}
|
|
|
|
static int __kprobes do_page_fault(unsigned long far, unsigned int esr,
|
|
struct pt_regs *regs)
|
|
{
|
|
const struct fault_info *inf;
|
|
struct mm_struct *mm = current->mm;
|
|
vm_fault_t fault;
|
|
unsigned long vm_flags;
|
|
unsigned int mm_flags = FAULT_FLAG_DEFAULT;
|
|
unsigned long addr = untagged_addr(far);
|
|
|
|
if (kprobe_page_fault(regs, esr))
|
|
return 0;
|
|
|
|
/*
|
|
* If we're in an interrupt or have no user context, we must not take
|
|
* the fault.
|
|
*/
|
|
if (faulthandler_disabled() || !mm)
|
|
goto no_context;
|
|
|
|
if (user_mode(regs))
|
|
mm_flags |= FAULT_FLAG_USER;
|
|
|
|
/*
|
|
* vm_flags tells us what bits we must have in vma->vm_flags
|
|
* for the fault to be benign, __do_page_fault() would check
|
|
* vma->vm_flags & vm_flags and returns an error if the
|
|
* intersection is empty
|
|
*/
|
|
if (is_el0_instruction_abort(esr)) {
|
|
/* It was exec fault */
|
|
vm_flags = VM_EXEC;
|
|
mm_flags |= FAULT_FLAG_INSTRUCTION;
|
|
} else if (is_write_abort(esr)) {
|
|
/* It was write fault */
|
|
vm_flags = VM_WRITE;
|
|
mm_flags |= FAULT_FLAG_WRITE;
|
|
} else {
|
|
/* It was read fault */
|
|
vm_flags = VM_READ;
|
|
/* Write implies read */
|
|
vm_flags |= VM_WRITE;
|
|
/* If EPAN is absent then exec implies read */
|
|
if (!cpus_have_const_cap(ARM64_HAS_EPAN))
|
|
vm_flags |= VM_EXEC;
|
|
}
|
|
|
|
if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
|
|
if (is_el1_instruction_abort(esr))
|
|
die_kernel_fault("execution of user memory",
|
|
addr, esr, regs);
|
|
|
|
if (!search_exception_tables(regs->pc))
|
|
die_kernel_fault("access to user memory outside uaccess routines",
|
|
addr, esr, regs);
|
|
}
|
|
|
|
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
|
|
|
|
/*
|
|
* As per x86, we may deadlock here. However, since the kernel only
|
|
* validly references user space from well defined areas of the code,
|
|
* we can bug out early if this is from code which shouldn't.
|
|
*/
|
|
if (!mmap_read_trylock(mm)) {
|
|
if (!user_mode(regs) && !search_exception_tables(regs->pc))
|
|
goto no_context;
|
|
retry:
|
|
mmap_read_lock(mm);
|
|
} else {
|
|
/*
|
|
* The above mmap_read_trylock() might have succeeded in which
|
|
* case, we'll have missed the might_sleep() from down_read().
|
|
*/
|
|
might_sleep();
|
|
#ifdef CONFIG_DEBUG_VM
|
|
if (!user_mode(regs) && !search_exception_tables(regs->pc)) {
|
|
mmap_read_unlock(mm);
|
|
goto no_context;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
fault = __do_page_fault(mm, addr, mm_flags, vm_flags, regs);
|
|
|
|
/* Quick path to respond to signals */
|
|
if (fault_signal_pending(fault, regs)) {
|
|
if (!user_mode(regs))
|
|
goto no_context;
|
|
return 0;
|
|
}
|
|
|
|
if (fault & VM_FAULT_RETRY) {
|
|
if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
|
|
mm_flags |= FAULT_FLAG_TRIED;
|
|
goto retry;
|
|
}
|
|
}
|
|
mmap_read_unlock(mm);
|
|
|
|
/*
|
|
* Handle the "normal" (no error) case first.
|
|
*/
|
|
if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
|
|
VM_FAULT_BADACCESS))))
|
|
return 0;
|
|
|
|
/*
|
|
* If we are in kernel mode at this point, we have no context to
|
|
* handle this fault with.
|
|
*/
|
|
if (!user_mode(regs))
|
|
goto no_context;
|
|
|
|
if (fault & VM_FAULT_OOM) {
|
|
/*
|
|
* We ran out of memory, call the OOM killer, and return to
|
|
* userspace (which will retry the fault, or kill us if we got
|
|
* oom-killed).
|
|
*/
|
|
pagefault_out_of_memory();
|
|
return 0;
|
|
}
|
|
|
|
inf = esr_to_fault_info(esr);
|
|
set_thread_esr(addr, esr);
|
|
if (fault & VM_FAULT_SIGBUS) {
|
|
/*
|
|
* We had some memory, but were unable to successfully fix up
|
|
* this page fault.
|
|
*/
|
|
arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
|
|
} else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
|
|
unsigned int lsb;
|
|
|
|
lsb = PAGE_SHIFT;
|
|
if (fault & VM_FAULT_HWPOISON_LARGE)
|
|
lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
|
|
|
|
arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
|
|
} else {
|
|
/*
|
|
* Something tried to access memory that isn't in our memory
|
|
* map.
|
|
*/
|
|
arm64_force_sig_fault(SIGSEGV,
|
|
fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR,
|
|
far, inf->name);
|
|
}
|
|
|
|
return 0;
|
|
|
|
no_context:
|
|
__do_kernel_fault(addr, esr, regs);
|
|
return 0;
|
|
}
|
|
|
|
static int __kprobes do_translation_fault(unsigned long far,
|
|
unsigned int esr,
|
|
struct pt_regs *regs)
|
|
{
|
|
unsigned long addr = untagged_addr(far);
|
|
|
|
if (is_ttbr0_addr(addr))
|
|
return do_page_fault(far, esr, regs);
|
|
|
|
do_bad_area(far, esr, regs);
|
|
return 0;
|
|
}
|
|
|
|
static int do_alignment_fault(unsigned long far, unsigned int esr,
|
|
struct pt_regs *regs)
|
|
{
|
|
do_bad_area(far, esr, regs);
|
|
return 0;
|
|
}
|
|
|
|
static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
|
{
|
|
return 1; /* "fault" */
|
|
}
|
|
|
|
static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
|
{
|
|
const struct fault_info *inf;
|
|
unsigned long siaddr;
|
|
|
|
inf = esr_to_fault_info(esr);
|
|
|
|
if (user_mode(regs) && apei_claim_sea(regs) == 0) {
|
|
/*
|
|
* APEI claimed this as a firmware-first notification.
|
|
* Some processing deferred to task_work before ret_to_user().
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
if (esr & ESR_ELx_FnV) {
|
|
siaddr = 0;
|
|
} else {
|
|
/*
|
|
* The architecture specifies that the tag bits of FAR_EL1 are
|
|
* UNKNOWN for synchronous external aborts. Mask them out now
|
|
* so that userspace doesn't see them.
|
|
*/
|
|
siaddr = untagged_addr(far);
|
|
}
|
|
arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int do_tag_check_fault(unsigned long far, unsigned int esr,
|
|
struct pt_regs *regs)
|
|
{
|
|
/*
|
|
* The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
|
|
* for tag check faults. Set them to corresponding bits in the untagged
|
|
* address.
|
|
*/
|
|
far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
|
|
do_bad_area(far, esr, regs);
|
|
return 0;
|
|
}
|
|
|
|
static const struct fault_info fault_info[] = {
|
|
{ do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" },
|
|
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
|
|
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
|
|
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
|
|
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 8" },
|
|
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
|
|
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
|
|
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 12" },
|
|
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
|
|
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
|
|
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
|
|
{ do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" },
|
|
{ do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 18" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 19" },
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" },
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" },
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" },
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" },
|
|
{ do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 25" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 26" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 27" },
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
|
|
{ do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 32" },
|
|
{ do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 34" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 35" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 36" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 37" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 38" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 39" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 40" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 41" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 42" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 43" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 44" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 45" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 46" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 47" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 50" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 51" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" },
|
|
{ do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 54" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 55" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 56" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 57" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 58" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 59" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 60" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "section domain fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "page domain fault" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
|
|
};
|
|
|
|
void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
|
{
|
|
const struct fault_info *inf = esr_to_fault_info(esr);
|
|
unsigned long addr = untagged_addr(far);
|
|
|
|
if (!inf->fn(far, esr, regs))
|
|
return;
|
|
|
|
if (!user_mode(regs)) {
|
|
pr_alert("Unhandled fault at 0x%016lx\n", addr);
|
|
mem_abort_decode(esr);
|
|
show_pte(addr);
|
|
}
|
|
|
|
/*
|
|
* At this point we have an unrecognized fault type whose tag bits may
|
|
* have been defined as UNKNOWN. Therefore we only expose the untagged
|
|
* address to the signal handler.
|
|
*/
|
|
arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
|
|
}
|
|
NOKPROBE_SYMBOL(do_mem_abort);
|
|
|
|
void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
|
{
|
|
arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
|
|
addr, esr);
|
|
}
|
|
NOKPROBE_SYMBOL(do_sp_pc_abort);
|
|
|
|
int __init early_brk64(unsigned long addr, unsigned int esr,
|
|
struct pt_regs *regs);
|
|
|
|
/*
|
|
* __refdata because early_brk64 is __init, but the reference to it is
|
|
* clobbered at arch_initcall time.
|
|
* See traps.c and debug-monitors.c:debug_traps_init().
|
|
*/
|
|
static struct fault_info __refdata debug_fault_info[] = {
|
|
{ do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
|
|
{ do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
|
|
{ do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 3" },
|
|
{ do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" },
|
|
{ early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
|
|
{ do_bad, SIGKILL, SI_KERNEL, "unknown 7" },
|
|
};
|
|
|
|
void __init hook_debug_fault_code(int nr,
|
|
int (*fn)(unsigned long, unsigned int, struct pt_regs *),
|
|
int sig, int code, const char *name)
|
|
{
|
|
BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
|
|
|
|
debug_fault_info[nr].fn = fn;
|
|
debug_fault_info[nr].sig = sig;
|
|
debug_fault_info[nr].code = code;
|
|
debug_fault_info[nr].name = name;
|
|
}
|
|
|
|
/*
|
|
* In debug exception context, we explicitly disable preemption despite
|
|
* having interrupts disabled.
|
|
* This serves two purposes: it makes it much less likely that we would
|
|
* accidentally schedule in exception context and it will force a warning
|
|
* if we somehow manage to schedule by accident.
|
|
*/
|
|
static void debug_exception_enter(struct pt_regs *regs)
|
|
{
|
|
preempt_disable();
|
|
|
|
/* This code is a bit fragile. Test it. */
|
|
RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
|
|
}
|
|
NOKPROBE_SYMBOL(debug_exception_enter);
|
|
|
|
static void debug_exception_exit(struct pt_regs *regs)
|
|
{
|
|
preempt_enable_no_resched();
|
|
}
|
|
NOKPROBE_SYMBOL(debug_exception_exit);
|
|
|
|
void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr,
|
|
struct pt_regs *regs)
|
|
{
|
|
const struct fault_info *inf = esr_to_debug_fault_info(esr);
|
|
unsigned long pc = instruction_pointer(regs);
|
|
|
|
debug_exception_enter(regs);
|
|
|
|
if (user_mode(regs) && !is_ttbr0_addr(pc))
|
|
arm64_apply_bp_hardening();
|
|
|
|
if (inf->fn(addr_if_watchpoint, esr, regs)) {
|
|
arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
|
|
}
|
|
|
|
debug_exception_exit(regs);
|
|
}
|
|
NOKPROBE_SYMBOL(do_debug_exception);
|
|
|
|
/*
|
|
* Used during anonymous page fault handling.
|
|
*/
|
|
struct page *alloc_zeroed_user_highpage_movable(struct vm_area_struct *vma,
|
|
unsigned long vaddr)
|
|
{
|
|
gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO;
|
|
|
|
/*
|
|
* If the page is mapped with PROT_MTE, initialise the tags at the
|
|
* point of allocation and page zeroing as this is usually faster than
|
|
* separate DC ZVA and STGM.
|
|
*/
|
|
if (vma->vm_flags & VM_MTE)
|
|
flags |= __GFP_ZEROTAGS;
|
|
|
|
return alloc_page_vma(flags, vma, vaddr);
|
|
}
|
|
|
|
void tag_clear_highpage(struct page *page)
|
|
{
|
|
mte_zero_clear_page_tags(page_address(page));
|
|
page_kasan_tag_reset(page);
|
|
set_bit(PG_mte_tagged, &page->flags);
|
|
}
|