forked from Minki/linux
105cf3c8c6
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJad5lgAAoJEFmIoMA60/r8s2kQAI3PztawDpaCP9Z12pkbBHSt Ho0xTyk9rCZi9kQJbNjc+a+QrlA3QmTHXIXerB3LSWoh7M+XhsECjem92eHpgLNS JvYPhTfOrCr0vdiAmOz6hD0AqN/psrbfzgiJhSwomsGEFS77k7kERSJckRv81sxb Aj5F/WjucAgLorwm4auveAJEQ7atE7/6pkXzoqYm4G6NLOb46jUcRGndrnvXZBlz fws8fBM4BHyi7i25CYQl24tFq1CGax1rIPgLg+4KnH76bQk/N6Ju0sGVSzfh+hG8 SIerK9bJbzGRAuNKoxB3aO1dyzsK3x9WztE2mG98w5trOISPIR1FqnvC/225FWAU d6eIXiC7wKnEx+DElNTzCjzfHc7SAJoupO32H7CoiTe5zPUlWlxJ1zLYkK1gt50q m8PRBiYTglxyznzrO0drtcdjEzvbdZNRrsYnul4wi1vSHzjk6F6XLtzT10XWM1M1 1pXLB8384FTj0Hu4bq6Y3Aivkmz0Sf+eQM2NaOwe+Zj7/1VV0d3lvi4LUXkqzLCA FoXPJSMxG2Qu+iflCeYRQBJjExaZH3eNLZ3dT6QpcJrjaFVedd9u5DeeFqNL27zV bhr8TdqrR4p4rc8EBAGoCapw96IxLZROKB3gxbrZVOpfIZpzthwHbElHX6aqUgF4 w/EV1JWs36WXWaxFk8wd =ttq9 -----END PGP SIGNATURE----- Merge tag 'pci-v4.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - skip AER driver error recovery callbacks for correctable errors reported via ACPI APEI, as we already do for errors reported via the native path (Tyler Baicar) - fix DPC shared interrupt handling (Alex Williamson) - print full DPC interrupt number (Keith Busch) - enable DPC only if AER is available (Keith Busch) - simplify DPC code (Bjorn Helgaas) - calculate ASPM L1 substate parameter instead of hardcoding it (Bjorn Helgaas) - enable Latency Tolerance Reporting for ASPM L1 substates (Bjorn Helgaas) - move ASPM internal interfaces out of public header (Bjorn Helgaas) - allow hot-removal of VGA devices (Mika Westerberg) - speed up unplug and shutdown by assuming Thunderbolt controllers don't support Command Completed events (Lukas Wunner) - add AtomicOps support for GPU and Infiniband drivers (Felix Kuehling, Jay Cornwall) - expose "ari_enabled" in sysfs to help NIC naming (Stuart Hayes) - clean up PCI DMA interface usage (Christoph Hellwig) - remove PCI pool API (replaced with DMA pool) (Romain Perier) - deprecate pci_get_bus_and_slot(), which assumed PCI domain 0 (Sinan Kaya) - move DT PCI code from drivers/of/ to drivers/pci/ (Rob Herring) - add PCI-specific wrappers for dev_info(), etc (Frederick Lawler) - remove warnings on sysfs mmap failure (Bjorn Helgaas) - quiet ROM validation messages (Alex Deucher) - remove redundant memory alloc failure messages (Markus Elfring) - fill in types for compile-time VGA and other I/O port resources (Bjorn Helgaas) - make "pci=pcie_scan_all" work for Root Ports as well as Downstream Ports to help AmigaOne X1000 (Bjorn Helgaas) - add SPDX tags to all PCI files (Bjorn Helgaas) - quirk Marvell 9128 DMA aliases (Alex Williamson) - quirk broken INTx disable on Ceton InfiniTV4 (Bjorn Helgaas) - fix CONFIG_PCI=n build by adding dummy pci_irqd_intx_xlate() (Niklas Cassel) - use DMA API to get MSI address for DesignWare IP (Niklas Cassel) - fix endpoint-mode DMA mask configuration (Kishon Vijay Abraham I) - fix ARTPEC-6 incorrect IS_ERR() usage (Wei Yongjun) - add support for ARTPEC-7 SoC (Niklas Cassel) - add endpoint-mode support for ARTPEC (Niklas Cassel) - add Cadence PCIe host and endpoint controller driver (Cyrille Pitchen) - handle multiple INTx status bits being set in dra7xx (Vignesh R) - translate dra7xx hwirq range to fix INTD handling (Vignesh R) - remove deprecated Exynos PHY initialization code (Jaehoon Chung) - fix MSI erratum workaround for HiSilicon Hip06/Hip07 (Dongdong Liu) - fix NULL pointer dereference in iProc BCMA driver (Ray Jui) - fix Keystone interrupt-controller-node lookup (Johan Hovold) - constify qcom driver structures (Julia Lawall) - rework Tegra config space mapping to increase space available for endpoints (Vidya Sagar) - simplify Tegra driver by using bus->sysdata (Manikanta Maddireddy) - remove PCI_REASSIGN_ALL_BUS usage on Tegra (Manikanta Maddireddy) - add support for Global Fabric Manager Server (GFMS) event to Microsemi Switchtec switch driver (Logan Gunthorpe) - add IDs for Switchtec PSX 24xG3 and PSX 48xG3 (Kelvin Cao) * tag 'pci-v4.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (140 commits) PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller PCI: endpoint: Fix EPF device name to support multi-function devices PCI: endpoint: Add the function number as argument to EPC ops PCI: cadence: Add host driver for Cadence PCIe controller dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe host controller PCI: Add vendor ID for Cadence PCI: Add generic function to probe PCI host controllers PCI: generic: fix missing call of pci_free_resource_list() PCI: OF: Add generic function to parse and allocate PCI resources PCI: Regroup all PCI related entries into drivers/pci/Makefile PCI/DPC: Reformat DPC register definitions PCI/DPC: Add and use DPC Status register field definitions PCI/DPC: Squash dpc_rp_pio_get_info() into dpc_process_rp_pio_error() PCI/DPC: Remove unnecessary RP PIO register structs PCI/DPC: Push dpc->rp_pio_status assignment into dpc_rp_pio_get_info() PCI/DPC: Squash dpc_rp_pio_print_error() into dpc_rp_pio_get_info() PCI/DPC: Make RP PIO log size check more generic PCI/DPC: Rename local "status" to "dpc_status" PCI/DPC: Squash dpc_rp_pio_print_tlp_header() into dpc_rp_pio_print_error() ...
524 lines
15 KiB
C
524 lines
15 KiB
C
/**************************************************************************
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* Copyright (c) 2007-2011, Intel Corporation.
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* All Rights Reserved.
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* Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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**************************************************************************/
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#include <drm/drmP.h>
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#include <drm/drm.h>
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#include "psb_drv.h"
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#include "framebuffer.h"
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#include "psb_reg.h"
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#include "psb_intel_reg.h"
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#include "intel_bios.h"
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#include "mid_bios.h"
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#include <drm/drm_pciids.h>
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#include "power.h"
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#include <linux/cpu.h>
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#include <linux/notifier.h>
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#include <linux/spinlock.h>
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#include <linux/pm_runtime.h>
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#include <acpi/video.h>
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#include <linux/module.h>
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#include <asm/set_memory.h>
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static struct drm_driver driver;
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static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
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/*
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* The table below contains a mapping of the PCI vendor ID and the PCI Device ID
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* to the different groups of PowerVR 5-series chip designs
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*
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* 0x8086 = Intel Corporation
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*
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* PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
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* PowerVR SGX535 - Moorestown - Intel GMA 600
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* PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
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* PowerVR SGX540 - Medfield - Intel Atom Z2460
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* PowerVR SGX544MP2 - Medfield -
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* PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
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* PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
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* N2800
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*/
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static const struct pci_device_id pciidlist[] = {
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{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
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{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
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#if defined(CONFIG_DRM_GMA600)
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{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
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#endif
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#if defined(CONFIG_DRM_MEDFIELD)
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{ 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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{ 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
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#endif
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#if defined(CONFIG_DRM_GMA3600)
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{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
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#endif
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, pciidlist);
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/*
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* Standard IOCTLs.
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*/
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static const struct drm_ioctl_desc psb_ioctls[] = {
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};
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static int psb_do_init(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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struct psb_gtt *pg = &dev_priv->gtt;
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uint32_t stolen_gtt;
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if (pg->mmu_gatt_start & 0x0FFFFFFF) {
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dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
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return -EINVAL;
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}
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stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
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stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
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stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
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dev_priv->gatt_free_offset = pg->mmu_gatt_start +
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(stolen_gtt << PAGE_SHIFT) * 1024;
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spin_lock_init(&dev_priv->irqmask_lock);
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spin_lock_init(&dev_priv->lock_2d);
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PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
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PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
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PSB_RSGX32(PSB_CR_BIF_BANK1);
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/* Do not bypass any MMU access, let them pagefault instead */
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PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
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PSB_CR_BIF_CTRL);
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PSB_RSGX32(PSB_CR_BIF_CTRL);
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psb_spank(dev_priv);
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/* mmu_gatt ?? */
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PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
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PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
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return 0;
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}
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static void psb_driver_unload(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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/* TODO: Kill vblank etc here */
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if (dev_priv) {
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if (dev_priv->backlight_device)
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gma_backlight_exit(dev);
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psb_modeset_cleanup(dev);
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if (dev_priv->ops->chip_teardown)
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dev_priv->ops->chip_teardown(dev);
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psb_intel_opregion_fini(dev);
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if (dev_priv->pf_pd) {
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psb_mmu_free_pagedir(dev_priv->pf_pd);
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dev_priv->pf_pd = NULL;
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}
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if (dev_priv->mmu) {
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struct psb_gtt *pg = &dev_priv->gtt;
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down_read(&pg->sem);
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psb_mmu_remove_pfn_sequence(
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psb_mmu_get_default_pd
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(dev_priv->mmu),
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pg->mmu_gatt_start,
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dev_priv->vram_stolen_size >> PAGE_SHIFT);
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up_read(&pg->sem);
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psb_mmu_driver_takedown(dev_priv->mmu);
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dev_priv->mmu = NULL;
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}
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psb_gtt_takedown(dev);
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if (dev_priv->scratch_page) {
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set_pages_wb(dev_priv->scratch_page, 1);
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__free_page(dev_priv->scratch_page);
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dev_priv->scratch_page = NULL;
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}
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if (dev_priv->vdc_reg) {
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iounmap(dev_priv->vdc_reg);
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dev_priv->vdc_reg = NULL;
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}
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if (dev_priv->sgx_reg) {
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iounmap(dev_priv->sgx_reg);
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dev_priv->sgx_reg = NULL;
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}
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if (dev_priv->aux_reg) {
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iounmap(dev_priv->aux_reg);
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dev_priv->aux_reg = NULL;
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}
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pci_dev_put(dev_priv->aux_pdev);
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pci_dev_put(dev_priv->lpc_pdev);
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/* Destroy VBT data */
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psb_intel_destroy_bios(dev);
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kfree(dev_priv);
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dev->dev_private = NULL;
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}
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gma_power_uninit(dev);
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}
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static int psb_driver_load(struct drm_device *dev, unsigned long flags)
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{
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struct drm_psb_private *dev_priv;
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unsigned long resource_start, resource_len;
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unsigned long irqflags;
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int ret = -ENOMEM;
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struct drm_connector *connector;
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struct gma_encoder *gma_encoder;
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struct psb_gtt *pg;
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/* allocating and initializing driver private data */
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dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
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if (dev_priv == NULL)
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return -ENOMEM;
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dev_priv->ops = (struct psb_ops *)flags;
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dev_priv->dev = dev;
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dev->dev_private = (void *) dev_priv;
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pg = &dev_priv->gtt;
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pci_set_master(dev->pdev);
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dev_priv->num_pipe = dev_priv->ops->pipes;
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resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
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dev_priv->vdc_reg =
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ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
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if (!dev_priv->vdc_reg)
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goto out_err;
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dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
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PSB_SGX_SIZE);
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if (!dev_priv->sgx_reg)
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goto out_err;
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if (IS_MRST(dev)) {
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int domain = pci_domain_nr(dev->pdev->bus);
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dev_priv->aux_pdev =
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pci_get_domain_bus_and_slot(domain, 0,
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PCI_DEVFN(3, 0));
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if (dev_priv->aux_pdev) {
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resource_start = pci_resource_start(dev_priv->aux_pdev,
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PSB_AUX_RESOURCE);
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resource_len = pci_resource_len(dev_priv->aux_pdev,
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PSB_AUX_RESOURCE);
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dev_priv->aux_reg = ioremap_nocache(resource_start,
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resource_len);
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if (!dev_priv->aux_reg)
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goto out_err;
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DRM_DEBUG_KMS("Found aux vdc");
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} else {
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/* Couldn't find the aux vdc so map to primary vdc */
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dev_priv->aux_reg = dev_priv->vdc_reg;
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DRM_DEBUG_KMS("Couldn't find aux pci device");
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}
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dev_priv->gmbus_reg = dev_priv->aux_reg;
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dev_priv->lpc_pdev =
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pci_get_domain_bus_and_slot(domain, 0,
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PCI_DEVFN(31, 0));
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if (dev_priv->lpc_pdev) {
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pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
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&dev_priv->lpc_gpio_base);
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pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
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(u32)dev_priv->lpc_gpio_base | (1L<<31));
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pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
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&dev_priv->lpc_gpio_base);
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dev_priv->lpc_gpio_base &= 0xffc0;
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if (dev_priv->lpc_gpio_base)
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DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
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dev_priv->lpc_gpio_base);
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else {
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pci_dev_put(dev_priv->lpc_pdev);
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dev_priv->lpc_pdev = NULL;
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}
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}
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} else {
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dev_priv->gmbus_reg = dev_priv->vdc_reg;
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}
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psb_intel_opregion_setup(dev);
|
|
|
|
ret = dev_priv->ops->chip_setup(dev);
|
|
if (ret)
|
|
goto out_err;
|
|
|
|
/* Init OSPM support */
|
|
gma_power_init(dev);
|
|
|
|
ret = -ENOMEM;
|
|
|
|
dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
|
|
if (!dev_priv->scratch_page)
|
|
goto out_err;
|
|
|
|
set_pages_uc(dev_priv->scratch_page, 1);
|
|
|
|
ret = psb_gtt_init(dev, 0);
|
|
if (ret)
|
|
goto out_err;
|
|
|
|
dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
|
|
if (!dev_priv->mmu)
|
|
goto out_err;
|
|
|
|
dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
|
|
if (!dev_priv->pf_pd)
|
|
goto out_err;
|
|
|
|
ret = psb_do_init(dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Add stolen memory to SGX MMU */
|
|
down_read(&pg->sem);
|
|
ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
|
|
dev_priv->stolen_base >> PAGE_SHIFT,
|
|
pg->gatt_start,
|
|
pg->stolen_size >> PAGE_SHIFT, 0);
|
|
up_read(&pg->sem);
|
|
|
|
psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
|
|
psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
|
|
|
|
PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
|
|
PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
|
|
|
|
acpi_video_register();
|
|
|
|
/* Setup vertical blanking handling */
|
|
ret = drm_vblank_init(dev, dev_priv->num_pipe);
|
|
if (ret)
|
|
goto out_err;
|
|
|
|
/*
|
|
* Install interrupt handlers prior to powering off SGX or else we will
|
|
* crash.
|
|
*/
|
|
dev_priv->vdc_irq_mask = 0;
|
|
dev_priv->pipestat[0] = 0;
|
|
dev_priv->pipestat[1] = 0;
|
|
dev_priv->pipestat[2] = 0;
|
|
spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
|
|
PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
|
|
PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
|
|
PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
|
|
spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
|
|
|
|
drm_irq_install(dev, dev->pdev->irq);
|
|
|
|
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
|
|
dev->driver->get_vblank_counter = psb_get_vblank_counter;
|
|
|
|
psb_modeset_init(dev);
|
|
psb_fbdev_init(dev);
|
|
drm_kms_helper_poll_init(dev);
|
|
|
|
/* Only add backlight support if we have LVDS output */
|
|
list_for_each_entry(connector, &dev->mode_config.connector_list,
|
|
head) {
|
|
gma_encoder = gma_attached_encoder(connector);
|
|
|
|
switch (gma_encoder->type) {
|
|
case INTEL_OUTPUT_LVDS:
|
|
case INTEL_OUTPUT_MIPI:
|
|
ret = gma_backlight_init(dev);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (ret)
|
|
return ret;
|
|
psb_intel_opregion_enable_asle(dev);
|
|
#if 0
|
|
/* Enable runtime pm at last */
|
|
pm_runtime_enable(&dev->pdev->dev);
|
|
pm_runtime_set_active(&dev->pdev->dev);
|
|
#endif
|
|
/* Intel drm driver load is done, continue doing pvr load */
|
|
return 0;
|
|
out_err:
|
|
psb_driver_unload(dev);
|
|
return ret;
|
|
}
|
|
|
|
static inline void get_brightness(struct backlight_device *bd)
|
|
{
|
|
#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
|
|
if (bd) {
|
|
bd->props.brightness = bd->ops->get_brightness(bd);
|
|
backlight_update_status(bd);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
struct drm_file *file_priv = filp->private_data;
|
|
struct drm_device *dev = file_priv->minor->dev;
|
|
struct drm_psb_private *dev_priv = dev->dev_private;
|
|
static unsigned int runtime_allowed;
|
|
|
|
if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
|
|
runtime_allowed++;
|
|
pm_runtime_allow(&dev->pdev->dev);
|
|
dev_priv->rpm_enabled = 1;
|
|
}
|
|
return drm_ioctl(filp, cmd, arg);
|
|
/* FIXME: do we need to wrap the other side of this */
|
|
}
|
|
|
|
static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
{
|
|
return drm_get_pci_dev(pdev, ent, &driver);
|
|
}
|
|
|
|
|
|
static void psb_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
drm_put_dev(dev);
|
|
}
|
|
|
|
static const struct dev_pm_ops psb_pm_ops = {
|
|
.resume = gma_power_resume,
|
|
.suspend = gma_power_suspend,
|
|
.thaw = gma_power_thaw,
|
|
.freeze = gma_power_freeze,
|
|
.restore = gma_power_restore,
|
|
.runtime_suspend = psb_runtime_suspend,
|
|
.runtime_resume = psb_runtime_resume,
|
|
.runtime_idle = psb_runtime_idle,
|
|
};
|
|
|
|
static const struct vm_operations_struct psb_gem_vm_ops = {
|
|
.fault = psb_gem_fault,
|
|
.open = drm_gem_vm_open,
|
|
.close = drm_gem_vm_close,
|
|
};
|
|
|
|
static const struct file_operations psb_gem_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = drm_open,
|
|
.release = drm_release,
|
|
.unlocked_ioctl = psb_unlocked_ioctl,
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
.mmap = drm_gem_mmap,
|
|
.poll = drm_poll,
|
|
.read = drm_read,
|
|
};
|
|
|
|
static struct drm_driver driver = {
|
|
.driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
|
|
DRIVER_MODESET | DRIVER_GEM,
|
|
.load = psb_driver_load,
|
|
.unload = psb_driver_unload,
|
|
.lastclose = drm_fb_helper_lastclose,
|
|
|
|
.num_ioctls = ARRAY_SIZE(psb_ioctls),
|
|
.irq_preinstall = psb_irq_preinstall,
|
|
.irq_postinstall = psb_irq_postinstall,
|
|
.irq_uninstall = psb_irq_uninstall,
|
|
.irq_handler = psb_irq_handler,
|
|
.enable_vblank = psb_enable_vblank,
|
|
.disable_vblank = psb_disable_vblank,
|
|
.get_vblank_counter = psb_get_vblank_counter,
|
|
|
|
.gem_free_object = psb_gem_free_object,
|
|
.gem_vm_ops = &psb_gem_vm_ops,
|
|
|
|
.dumb_create = psb_gem_dumb_create,
|
|
.ioctls = psb_ioctls,
|
|
.fops = &psb_gem_fops,
|
|
.name = DRIVER_NAME,
|
|
.desc = DRIVER_DESC,
|
|
.date = DRIVER_DATE,
|
|
.major = DRIVER_MAJOR,
|
|
.minor = DRIVER_MINOR,
|
|
.patchlevel = DRIVER_PATCHLEVEL
|
|
};
|
|
|
|
static struct pci_driver psb_pci_driver = {
|
|
.name = DRIVER_NAME,
|
|
.id_table = pciidlist,
|
|
.probe = psb_pci_probe,
|
|
.remove = psb_pci_remove,
|
|
.driver.pm = &psb_pm_ops,
|
|
};
|
|
|
|
static int __init psb_init(void)
|
|
{
|
|
return pci_register_driver(&psb_pci_driver);
|
|
}
|
|
|
|
static void __exit psb_exit(void)
|
|
{
|
|
pci_unregister_driver(&psb_pci_driver);
|
|
}
|
|
|
|
late_initcall(psb_init);
|
|
module_exit(psb_exit);
|
|
|
|
MODULE_AUTHOR(DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_LICENSE("GPL");
|