Marc Zyngier 9d218a1fcf arm64: KVM: flush VM pages before letting the guest enable caches ... When the guest runs with caches disabled (like in an early boot sequence, for example), all the writes are diectly going to RAM, bypassing the caches altogether. Once the MMU and caches are enabled, whatever sits in the cache becomes suddenly visible, which isn't what the guest expects. A way to avoid this potential disaster is to invalidate the cache when the MMU is being turned on. For this, we hook into the SCTLR_EL1 trapping code, and scan the stage-2 page tables, invalidating the pages/sections that have already been mapped in. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>		2014-03-03 01:15:22 +00:00
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asm	arm64: KVM: flush VM pages before letting the guest enable caches	2014-03-03 01:15:22 +00:00
uapi/asm	arm64: KVM: Add VGIC device control for arm64	2014-02-14 11:09:49 +01:00