forked from Minki/linux
9c9f6f8d47
The mdp5 kms driver currently sets up multiple encoders per interface (INTF), one for each kind of mode of operation it supports. We create 2 drm_encoders for DSI, one for Video Mode and the other for Command Mode operation. The reason behind this approach could have been that we aren't aware of the DSI device's mode of operation when we create the encoders. This makes things a bit complicated, since these encoders have to be further attached to the same DSI bridge. The easier way out is to create a single encoder, and make the DSI driver set its mode of operation when we know what the DSI device's mode flags are. Start with providing a way to set the mdp5_intf_mode using a kms func that sets the encoder's mode of operation. When constructing a DSI encoder, we set the mode of operation to Video Mode as default. When the DSI device is attached to the host, we probe the DSI mode flags and set the corresponding mode of operation. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
272 lines
7.2 KiB
C
272 lines
7.2 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MDP5_KMS_H__
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#define __MDP5_KMS_H__
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#include "msm_drv.h"
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#include "msm_kms.h"
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#include "mdp/mdp_kms.h"
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#include "mdp5_cfg.h" /* must be included before mdp5.xml.h */
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#include "mdp5.xml.h"
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#include "mdp5_ctl.h"
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#include "mdp5_pipe.h"
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#include "mdp5_smp.h"
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struct mdp5_state;
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struct mdp5_kms {
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struct mdp_kms base;
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struct drm_device *dev;
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struct platform_device *pdev;
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unsigned num_hwpipes;
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struct mdp5_hw_pipe *hwpipes[SSPP_MAX];
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struct mdp5_cfg_handler *cfg;
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uint32_t caps; /* MDP capabilities (MDP_CAP_XXX bits) */
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/**
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* Global atomic state. Do not access directly, use mdp5_get_state()
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*/
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struct mdp5_state *state;
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struct drm_modeset_lock state_lock;
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/* mapper-id used to request GEM buffer mapped for scanout: */
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int id;
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struct msm_gem_address_space *aspace;
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struct mdp5_smp *smp;
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struct mdp5_ctl_manager *ctlm;
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/* io/register spaces: */
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void __iomem *mmio;
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struct clk *axi_clk;
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struct clk *ahb_clk;
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struct clk *core_clk;
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struct clk *lut_clk;
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struct clk *vsync_clk;
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/*
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* lock to protect access to global resources: ie., following register:
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* - REG_MDP5_DISP_INTF_SEL
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*/
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spinlock_t resource_lock;
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bool rpm_enabled;
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struct mdp_irq error_handler;
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};
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#define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base)
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/* Global atomic state for tracking resources that are shared across
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* multiple kms objects (planes/crtcs/etc).
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*
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* For atomic updates which require modifying global state,
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*/
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struct mdp5_state {
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struct mdp5_hw_pipe_state hwpipe;
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struct mdp5_smp_state smp;
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};
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struct mdp5_state *__must_check
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mdp5_get_state(struct drm_atomic_state *s);
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/* Atomic plane state. Subclasses the base drm_plane_state in order to
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* track assigned hwpipe and hw specific state.
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*/
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struct mdp5_plane_state {
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struct drm_plane_state base;
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struct mdp5_hw_pipe *hwpipe;
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/* aligned with property */
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uint8_t premultiplied;
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uint8_t zpos;
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uint8_t alpha;
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/* assigned by crtc blender */
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enum mdp_mixer_stage_id stage;
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};
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#define to_mdp5_plane_state(x) \
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container_of(x, struct mdp5_plane_state, base)
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enum mdp5_intf_mode {
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MDP5_INTF_MODE_NONE = 0,
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/* Modes used for DSI interface (INTF_DSI type): */
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MDP5_INTF_DSI_MODE_VIDEO,
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MDP5_INTF_DSI_MODE_COMMAND,
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/* Modes used for WB interface (INTF_WB type): */
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MDP5_INTF_WB_MODE_BLOCK,
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MDP5_INTF_WB_MODE_LINE,
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};
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struct mdp5_interface {
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int num; /* display interface number */
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enum mdp5_intf_type type;
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enum mdp5_intf_mode mode;
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};
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static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data)
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{
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msm_writel(data, mdp5_kms->mmio + reg);
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}
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static inline u32 mdp5_read(struct mdp5_kms *mdp5_kms, u32 reg)
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{
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return msm_readl(mdp5_kms->mmio + reg);
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}
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static inline const char *stage2name(enum mdp_mixer_stage_id stage)
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{
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static const char *names[] = {
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#define NAME(n) [n] = #n
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NAME(STAGE_UNUSED), NAME(STAGE_BASE),
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NAME(STAGE0), NAME(STAGE1), NAME(STAGE2),
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NAME(STAGE3), NAME(STAGE4), NAME(STAGE6),
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#undef NAME
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};
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return names[stage];
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}
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static inline const char *pipe2name(enum mdp5_pipe pipe)
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{
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static const char *names[] = {
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#define NAME(n) [SSPP_ ## n] = #n
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NAME(VIG0), NAME(VIG1), NAME(VIG2),
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NAME(RGB0), NAME(RGB1), NAME(RGB2),
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NAME(DMA0), NAME(DMA1),
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NAME(VIG3), NAME(RGB3),
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#undef NAME
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};
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return names[pipe];
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}
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static inline int pipe2nclients(enum mdp5_pipe pipe)
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{
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switch (pipe) {
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case SSPP_RGB0:
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case SSPP_RGB1:
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case SSPP_RGB2:
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case SSPP_RGB3:
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return 1;
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default:
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return 3;
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}
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}
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static inline uint32_t intf2err(int intf_num)
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{
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switch (intf_num) {
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case 0: return MDP5_IRQ_INTF0_UNDER_RUN;
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case 1: return MDP5_IRQ_INTF1_UNDER_RUN;
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case 2: return MDP5_IRQ_INTF2_UNDER_RUN;
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case 3: return MDP5_IRQ_INTF3_UNDER_RUN;
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default: return 0;
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}
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}
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#define GET_PING_PONG_ID(layer_mixer) ((layer_mixer == 5) ? 3 : layer_mixer)
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static inline uint32_t intf2vblank(int lm, struct mdp5_interface *intf)
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{
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/*
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* In case of DSI Command Mode, the Ping Pong's read pointer IRQ
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* acts as a Vblank signal. The Ping Pong buffer used is bound to
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* layer mixer.
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*/
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if ((intf->type == INTF_DSI) &&
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(intf->mode == MDP5_INTF_DSI_MODE_COMMAND))
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return MDP5_IRQ_PING_PONG_0_RD_PTR << GET_PING_PONG_ID(lm);
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if (intf->type == INTF_WB)
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return MDP5_IRQ_WB_2_DONE;
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switch (intf->num) {
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case 0: return MDP5_IRQ_INTF0_VSYNC;
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case 1: return MDP5_IRQ_INTF1_VSYNC;
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case 2: return MDP5_IRQ_INTF2_VSYNC;
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case 3: return MDP5_IRQ_INTF3_VSYNC;
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default: return 0;
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}
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}
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static inline uint32_t lm2ppdone(int lm)
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{
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return MDP5_IRQ_PING_PONG_0_DONE << GET_PING_PONG_ID(lm);
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}
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int mdp5_disable(struct mdp5_kms *mdp5_kms);
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int mdp5_enable(struct mdp5_kms *mdp5_kms);
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void mdp5_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
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uint32_t old_irqmask);
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void mdp5_irq_preinstall(struct msm_kms *kms);
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int mdp5_irq_postinstall(struct msm_kms *kms);
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void mdp5_irq_uninstall(struct msm_kms *kms);
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irqreturn_t mdp5_irq(struct msm_kms *kms);
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int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
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void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
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int mdp5_irq_domain_init(struct mdp5_kms *mdp5_kms);
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void mdp5_irq_domain_fini(struct mdp5_kms *mdp5_kms);
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uint32_t mdp5_plane_get_flush(struct drm_plane *plane);
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enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);
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struct drm_plane *mdp5_plane_init(struct drm_device *dev, bool primary);
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uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc);
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int mdp5_crtc_get_lm(struct drm_crtc *crtc);
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void mdp5_crtc_set_pipeline(struct drm_crtc *crtc,
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struct mdp5_interface *intf, struct mdp5_ctl *ctl);
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void mdp5_crtc_wait_for_commit_done(struct drm_crtc *crtc);
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struct drm_crtc *mdp5_crtc_init(struct drm_device *dev,
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struct drm_plane *plane, int id);
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struct drm_encoder *mdp5_encoder_init(struct drm_device *dev,
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struct mdp5_interface *intf, struct mdp5_ctl *ctl);
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int mdp5_encoder_set_split_display(struct drm_encoder *encoder,
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struct drm_encoder *slave_encoder);
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void mdp5_encoder_set_intf_mode(struct drm_encoder *encoder, bool cmd_mode);
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int mdp5_encoder_get_linecount(struct drm_encoder *encoder);
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u32 mdp5_encoder_get_framecount(struct drm_encoder *encoder);
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#ifdef CONFIG_DRM_MSM_DSI
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struct drm_encoder *mdp5_cmd_encoder_init(struct drm_device *dev,
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struct mdp5_interface *intf, struct mdp5_ctl *ctl);
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int mdp5_cmd_encoder_set_split_display(struct drm_encoder *encoder,
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struct drm_encoder *slave_encoder);
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#else
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static inline struct drm_encoder *mdp5_cmd_encoder_init(struct drm_device *dev,
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struct mdp5_interface *intf, struct mdp5_ctl *ctl)
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{
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return ERR_PTR(-EINVAL);
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}
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static inline int mdp5_cmd_encoder_set_split_display(
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struct drm_encoder *encoder, struct drm_encoder *slave_encoder)
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{
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return -EINVAL;
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}
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#endif
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#endif /* __MDP5_KMS_H__ */
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