forked from Minki/linux
c0fc18c5bf
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
181 lines
4.1 KiB
C
181 lines
4.1 KiB
C
/*
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* arch/arm/mach-omap2/serial.c
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*
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* OMAP2 serial support.
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*
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* Copyright (C) 2005 Nokia Corporation
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* Author: Paul Mundt <paul.mundt@nokia.com>
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*
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* Based off of arch/arm/mach-omap/omap1/serial.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/clk.h>
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#include <asm/io.h>
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#include <mach/common.h>
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#include <mach/board.h>
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static struct clk * uart1_ick = NULL;
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static struct clk * uart1_fck = NULL;
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static struct clk * uart2_ick = NULL;
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static struct clk * uart2_fck = NULL;
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static struct clk * uart3_ick = NULL;
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static struct clk * uart3_fck = NULL;
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.membase = IO_ADDRESS(OMAP_UART1_BASE),
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.mapbase = OMAP_UART1_BASE,
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.irq = 72,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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}, {
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.membase = IO_ADDRESS(OMAP_UART2_BASE),
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.mapbase = OMAP_UART2_BASE,
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.irq = 73,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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}, {
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.membase = IO_ADDRESS(OMAP_UART3_BASE),
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.mapbase = OMAP_UART3_BASE,
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.irq = 74,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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}, {
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.flags = 0
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}
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};
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static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
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int offset)
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{
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offset <<= up->regshift;
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return (unsigned int)__raw_readb(up->membase + offset);
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}
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static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
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int value)
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{
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offset <<= p->regshift;
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__raw_writeb(value, p->membase + offset);
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}
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/*
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* Internal UARTs need to be initialized for the 8250 autoconfig to work
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* properly. Note that the TX watermark initialization may not be needed
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* once the 8250.c watermark handling code is merged.
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*/
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static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
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{
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serial_write_reg(p, UART_OMAP_MDR1, 0x07);
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serial_write_reg(p, UART_OMAP_SCR, 0x08);
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serial_write_reg(p, UART_OMAP_MDR1, 0x00);
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serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
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}
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void __init omap_serial_init()
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{
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int i;
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const struct omap_uart_config *info;
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/*
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* Make sure the serial ports are muxed on at this point.
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* You have to mux them off in device drivers later on
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* if not needed.
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*/
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info = omap_get_config(OMAP_TAG_UART,
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struct omap_uart_config);
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if (info == NULL)
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return;
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for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
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struct plat_serial8250_port *p = serial_platform_data + i;
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if (!(info->enabled_uarts & (1 << i))) {
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p->membase = NULL;
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p->mapbase = 0;
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continue;
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}
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switch (i) {
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case 0:
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uart1_ick = clk_get(NULL, "uart1_ick");
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if (IS_ERR(uart1_ick))
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printk("Could not get uart1_ick\n");
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else {
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clk_enable(uart1_ick);
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}
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uart1_fck = clk_get(NULL, "uart1_fck");
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if (IS_ERR(uart1_fck))
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printk("Could not get uart1_fck\n");
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else {
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clk_enable(uart1_fck);
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}
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break;
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case 1:
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uart2_ick = clk_get(NULL, "uart2_ick");
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if (IS_ERR(uart2_ick))
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printk("Could not get uart2_ick\n");
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else {
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clk_enable(uart2_ick);
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}
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uart2_fck = clk_get(NULL, "uart2_fck");
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if (IS_ERR(uart2_fck))
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printk("Could not get uart2_fck\n");
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else {
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clk_enable(uart2_fck);
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}
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break;
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case 2:
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uart3_ick = clk_get(NULL, "uart3_ick");
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if (IS_ERR(uart3_ick))
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printk("Could not get uart3_ick\n");
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else {
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clk_enable(uart3_ick);
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}
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uart3_fck = clk_get(NULL, "uart3_fck");
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if (IS_ERR(uart3_fck))
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printk("Could not get uart3_fck\n");
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else {
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clk_enable(uart3_fck);
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}
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break;
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}
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omap_serial_reset(p);
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}
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}
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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static int __init omap_init(void)
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{
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return platform_device_register(&serial_device);
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}
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arch_initcall(omap_init);
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