forked from Minki/linux
9c057b3e02
This add south-bridge (SB700/SB710/SB800 chipset) ACPI platform driver for Loongson-3. This will be used by EC (Embedded Controller, used by laptops) driver and STR (Suspend To RAM). [ralf@linux-mips.org: Fix build error if !CONFIG_CPU_LOONGSON3. Build doesn't like it if no obj-* variable is defined at all in a Makefile. Obviously this has not been tested on other platforms.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9619/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
102 lines
3.0 KiB
C
102 lines
3.0 KiB
C
/*
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* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/pci.h>
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#include <pci.h>
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#include <loongson.h>
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#include <boot_param.h>
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static struct resource loongson_pci_mem_resource = {
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.name = "pci memory space",
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.start = LOONGSON_PCI_MEM_START,
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.end = LOONGSON_PCI_MEM_END,
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.flags = IORESOURCE_MEM,
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};
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static struct resource loongson_pci_io_resource = {
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.name = "pci io space",
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.start = LOONGSON_PCI_IO_START,
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.end = IO_SPACE_LIMIT,
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.flags = IORESOURCE_IO,
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};
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static struct pci_controller loongson_pci_controller = {
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.pci_ops = &loongson_pci_ops,
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.io_resource = &loongson_pci_io_resource,
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.mem_resource = &loongson_pci_mem_resource,
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.mem_offset = 0x00000000UL,
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.io_offset = 0x00000000UL,
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};
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static void __init setup_pcimap(void)
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{
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/*
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* local to PCI mapping for CPU accessing PCI space
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* CPU address space [256M,448M] is window for accessing pci space
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* we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
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*
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* pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
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* [<2G] [384M,448M] [320M,384M] [0M,64M]
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*/
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LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 |
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LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) |
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LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) |
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LOONGSON_PCIMAP_WIN(0, 0);
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/*
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* PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
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*/
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LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */
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/* size: 256M, burst transmission, pre-fetch enable, 64bit */
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LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
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LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
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LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
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LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
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LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
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LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
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/* avoid deadlock of PCI reading/writing lock operation */
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LOONGSON_PCI_ISR4C = 0xd2000001ul;
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/* can not change gnt to break pci transfer when device's gnt not
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deassert for some broken device */
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LOONGSON_PXARB_CFG = 0x00fe0105ul;
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#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
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/*
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* set cpu addr window2 to map CPU address space to PCI address space
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*/
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LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
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LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
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#endif
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}
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extern int sbx00_acpi_init(void);
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static int __init pcibios_init(void)
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{
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setup_pcimap();
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loongson_pci_controller.io_map_base = mips_io_port_base;
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#ifdef CONFIG_LEFI_FIRMWARE_INTERFACE
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loongson_pci_mem_resource.start = loongson_sysconf.pci_mem_start_addr;
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loongson_pci_mem_resource.end = loongson_sysconf.pci_mem_end_addr;
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#endif
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register_pci_controller(&loongson_pci_controller);
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#ifdef CONFIG_CPU_LOONGSON3
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sbx00_acpi_init();
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#endif
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return 0;
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}
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arch_initcall(pcibios_init);
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