linux/drivers/clk
Doug Anderson 9c030ea70b clk: rockchip: change pll rate without a clk-notifier
The Rockchip PLL code switches into slow mode (AKA bypass more AKA
24MHz mode) before actually changing the PLL.  This keeps anyone from
using the PLL while it's changing.  However, in all known Rockchip
SoCs nobody should ever see the 24MHz when changing the PLL supplying
the armclk because we should reparent children to an alternate
(faster than 24MHz) PLL.

One problem is that the code to switch to an alternate parent was
running in PRE_RATE_CHANGE.  ...and the code to switch to slow mode
was _also_ running in PRE_RATE_CHANGE.  That meant there was no real
guarantee that we would switch to an alternate parent before switching
to 24MHz mode.

Let's move the switch to "slow mode" straight into
rockchip_rk3066_pll_set_rate().  That means we're guaranteed that the
24MHz is really a last-resort.

Note that without this change on real systems we were the code to
switch to an alternate parent at 24MHz.  In some older versions of
that code we'd appy a (temporary) / 5 to the 24MHz causing us to run
at 4.8MHz.  That wasn't enough to service USB interrupts in some cases
and could lead to a system hang.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-27 17:57:04 +02:00
..
at91 Merge branch 'clk-fixes' into clk-next 2014-09-17 11:47:56 -07:00
bcm clk: bcm/kona: implement determine_rate() 2014-05-27 17:34:32 -07:00
berlin clk: berlin: add core clock driver for BG2Q 2014-05-29 09:30:19 -07:00
hisilicon clk: hisi: add clk-hix5hd2.c 2014-05-12 11:30:32 +08:00
keystone clk: keystone: gate: fix clk_init_data initialization 2014-02-10 15:17:43 -05:00
mmp clk: mmp: try to use closer one when do round rate 2014-03-26 20:59:27 -07:00
mvebu cpufreq: kirkwood: use the powersave multiplexer 2014-09-02 15:02:54 -07:00
mxs ARM: mxs: remove custom .init_time hook 2013-09-29 21:09:34 +02:00
qcom clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
rockchip clk: rockchip: change pll rate without a clk-notifier 2014-09-27 17:57:04 +02:00
samsung clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
shmobile clk: shmobile: add missing 0x0100 for SDCKCR 2014-09-02 15:03:16 -07:00
sirf clk: sirf: update copyright years to 2014 2014-03-26 21:47:35 -07:00
socfpga Adds support getting the divider registers for the MAIN PLL that was once 2014-05-12 19:11:13 -07:00
spear Merge branch 'clk-fixes' into clk-next 2014-07-13 07:56:45 -07:00
st clk: st: Use round to closest divider flag 2014-07-28 22:37:16 -07:00
sunxi clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
tegra ARM: SoC cleanups for 3.17 2014-08-08 11:00:26 -07:00
ti clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
ux500 clk: ux500: Staticize ux500_twocell_get 2014-02-23 15:04:40 -08:00
versatile clk: versatile: add versatile OSC support 2014-06-24 14:21:22 -05:00
x86 ACPI / LPSS: add support for Intel BayTrail 2013-06-19 01:08:47 +02:00
zynq clk: zynq: Move const initdata into correct code section 2014-09-09 12:18:20 -07:00
clk-axi-clkgen.c clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
clk-axm5516.c clk: Add clock driver for AXM55xx SoC 2014-05-22 22:06:14 -07:00
clk-bcm2835.c ARM: bcm2835: remove custom .init_time hook 2013-09-29 21:09:24 +02:00
clk-clps711x.c clk: Add CLPS711X clk driver 2014-07-28 23:30:46 -07:00
clk-composite.c clk: composite: improve rate_hw sanity check logic 2014-07-13 12:17:05 -07:00
clk-conf.c clk: Add missing of_clk_set_defaults export 2014-08-04 09:48:39 -07:00
clk-devres.c
clk-divider.c clk: divider: Fix overflow in clk_divider_bestdiv 2014-05-27 19:16:24 -07:00
clk-efm32gg.c clk/efm32gg: fix dt init prototype 2014-09-09 13:52:18 -07:00
clk-fixed-factor.c Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial 2013-11-15 16:47:22 -08:00
clk-fixed-rate.c clk: add accuracy support for fixed clock 2013-12-22 23:14:28 -08:00
clk-fractional-divider.c clk: fractional-divider: cast parent_rate to u64 before multiplying 2014-09-10 09:42:37 -07:00
clk-gate.c clk: wrap I/O access for improved portability 2013-08-27 17:50:38 -07:00
clk-highbank.c ARM: highbank: remove custom .init_time hook 2013-09-29 21:09:29 +02:00
clk-ls1x.c
clk-max77686.c clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
clk-max77802.c clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
clk-max-gen.c clk: Add generic driver for Maxim PMIC clocks 2014-09-09 13:55:44 -07:00
clk-max-gen.h clk: Add generic driver for Maxim PMIC clocks 2014-09-09 13:55:44 -07:00
clk-moxart.c clk: add MOXA ART SoCs clock driver 2014-03-18 17:13:14 -07:00
clk-mux.c clk: wrap I/O access for improved portability 2013-08-27 17:50:38 -07:00
clk-nomadik.c clk: nomadik: fix multiplatform problem 2014-02-26 11:14:44 -08:00
clk-nspire.c
clk-palmas.c clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
clk-ppc-corenet.c clk: ppc-corenet: Fix Section mismatch warning 2014-07-01 20:11:22 -07:00
clk-s2mps11.c Merge branch 'clk-fixes' into clk-next 2014-07-03 11:55:42 -07:00
clk-si570.c clk: si570: Fix email address specifiction 2014-05-20 16:18:18 +02:00
clk-si5351.c The second half of the clock framework pull requeust for 3.14 is 2014-01-28 18:44:53 -08:00
clk-si5351.h clk: si5351: remove variant from platform_data 2014-01-27 11:20:22 -08:00
clk-twl6040.c clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
clk-u300.c clk: u300: Terminate of match table 2014-05-27 18:29:04 -07:00
clk-vt8500.c clk: vt8500: Staticize vtwm_pll_ops 2013-12-19 17:47:32 -08:00
clk-wm831x.c clk: Remove .owner field for driver 2014-09-25 17:43:31 -07:00
clk-xgene.c clk: Add APM X-Gene SoC clock driver 2013-10-07 11:22:15 -07:00
clk.c Merge branch 'clk-fixes' into clk-next 2014-09-17 11:47:56 -07:00
clk.h clk: Add of_clk_get_by_clkspec() helper 2014-05-22 15:54:59 -07:00
clkdev.c clkdev: Don't print errors on probe defer 2014-06-26 12:55:03 -07:00
Kconfig clk: Add driver for Maxim 77802 PMIC clocks 2014-09-09 13:55:59 -07:00
Makefile clk: Add driver for Maxim 77802 PMIC clocks 2014-09-09 13:55:59 -07:00