forked from Minki/linux
bcb486f026
Add the compatible strings and the include file for ipq8074 gcc clock controller. Acked-by: Rob Herring <robh@kernel.org> (bindings) Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
153 lines
5.0 KiB
C
153 lines
5.0 KiB
C
/*
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* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_8074_H
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#define _DT_BINDINGS_CLOCK_IPQ_GCC_8074_H
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#define GPLL0 0
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#define GPLL0_MAIN 1
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#define GCC_SLEEP_CLK_SRC 2
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#define BLSP1_QUP1_I2C_APPS_CLK_SRC 3
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#define BLSP1_QUP1_SPI_APPS_CLK_SRC 4
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#define BLSP1_QUP2_I2C_APPS_CLK_SRC 5
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#define BLSP1_QUP2_SPI_APPS_CLK_SRC 6
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#define BLSP1_QUP3_I2C_APPS_CLK_SRC 7
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#define BLSP1_QUP3_SPI_APPS_CLK_SRC 8
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#define BLSP1_QUP4_I2C_APPS_CLK_SRC 9
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#define BLSP1_QUP4_SPI_APPS_CLK_SRC 10
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#define BLSP1_QUP5_I2C_APPS_CLK_SRC 11
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#define BLSP1_QUP5_SPI_APPS_CLK_SRC 12
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#define BLSP1_QUP6_I2C_APPS_CLK_SRC 13
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#define BLSP1_QUP6_SPI_APPS_CLK_SRC 14
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#define BLSP1_UART1_APPS_CLK_SRC 15
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#define BLSP1_UART2_APPS_CLK_SRC 16
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#define BLSP1_UART3_APPS_CLK_SRC 17
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#define BLSP1_UART4_APPS_CLK_SRC 18
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#define BLSP1_UART5_APPS_CLK_SRC 19
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#define BLSP1_UART6_APPS_CLK_SRC 20
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#define GCC_BLSP1_AHB_CLK 21
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#define GCC_BLSP1_QUP1_I2C_APPS_CLK 22
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#define GCC_BLSP1_QUP1_SPI_APPS_CLK 23
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#define GCC_BLSP1_QUP2_I2C_APPS_CLK 24
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#define GCC_BLSP1_QUP2_SPI_APPS_CLK 25
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#define GCC_BLSP1_QUP3_I2C_APPS_CLK 26
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#define GCC_BLSP1_QUP3_SPI_APPS_CLK 27
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#define GCC_BLSP1_QUP4_I2C_APPS_CLK 28
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#define GCC_BLSP1_QUP4_SPI_APPS_CLK 29
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#define GCC_BLSP1_QUP5_I2C_APPS_CLK 30
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#define GCC_BLSP1_QUP5_SPI_APPS_CLK 31
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#define GCC_BLSP1_QUP6_I2C_APPS_CLK 32
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#define GCC_BLSP1_QUP6_SPI_APPS_CLK 33
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#define GCC_BLSP1_UART1_APPS_CLK 34
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#define GCC_BLSP1_UART2_APPS_CLK 35
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#define GCC_BLSP1_UART3_APPS_CLK 36
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#define GCC_BLSP1_UART4_APPS_CLK 37
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#define GCC_BLSP1_UART5_APPS_CLK 38
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#define GCC_BLSP1_UART6_APPS_CLK 39
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#define GCC_PRNG_AHB_CLK 40
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#define GCC_QPIC_AHB_CLK 41
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#define GCC_QPIC_CLK 42
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#define PCNOC_BFDCD_CLK_SRC 43
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#define GCC_BLSP1_BCR 0
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#define GCC_BLSP1_QUP1_BCR 1
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#define GCC_BLSP1_UART1_BCR 2
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#define GCC_BLSP1_QUP2_BCR 3
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#define GCC_BLSP1_UART2_BCR 4
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#define GCC_BLSP1_QUP3_BCR 5
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#define GCC_BLSP1_UART3_BCR 6
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#define GCC_BLSP1_QUP4_BCR 7
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#define GCC_BLSP1_UART4_BCR 8
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#define GCC_BLSP1_QUP5_BCR 9
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#define GCC_BLSP1_UART5_BCR 10
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#define GCC_BLSP1_QUP6_BCR 11
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#define GCC_BLSP1_UART6_BCR 12
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#define GCC_IMEM_BCR 13
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#define GCC_SMMU_BCR 14
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#define GCC_APSS_TCU_BCR 15
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#define GCC_SMMU_XPU_BCR 16
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#define GCC_PCNOC_TBU_BCR 17
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#define GCC_SMMU_CFG_BCR 18
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#define GCC_PRNG_BCR 19
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#define GCC_BOOT_ROM_BCR 20
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#define GCC_CRYPTO_BCR 21
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#define GCC_WCSS_BCR 22
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#define GCC_WCSS_Q6_BCR 23
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#define GCC_NSS_BCR 24
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#define GCC_SEC_CTRL_BCR 25
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#define GCC_ADSS_BCR 26
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#define GCC_DDRSS_BCR 27
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#define GCC_SYSTEM_NOC_BCR 28
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#define GCC_PCNOC_BCR 29
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#define GCC_TCSR_BCR 30
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#define GCC_QDSS_BCR 31
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#define GCC_DCD_BCR 32
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#define GCC_MSG_RAM_BCR 33
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#define GCC_MPM_BCR 34
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#define GCC_SPMI_BCR 35
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#define GCC_SPDM_BCR 36
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#define GCC_RBCPR_BCR 37
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#define GCC_RBCPR_MX_BCR 38
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#define GCC_TLMM_BCR 39
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#define GCC_RBCPR_WCSS_BCR 40
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#define GCC_USB0_PHY_BCR 41
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#define GCC_USB3PHY_0_PHY_BCR 42
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#define GCC_USB0_BCR 43
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#define GCC_USB1_PHY_BCR 44
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#define GCC_USB3PHY_1_PHY_BCR 45
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#define GCC_USB1_BCR 46
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#define GCC_QUSB2_0_PHY_BCR 47
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#define GCC_QUSB2_1_PHY_BCR 48
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#define GCC_SDCC1_BCR 49
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#define GCC_SDCC2_BCR 50
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#define GCC_SNOC_BUS_TIMEOUT0_BCR 51
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#define GCC_SNOC_BUS_TIMEOUT2_BCR 52
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#define GCC_SNOC_BUS_TIMEOUT3_BCR 53
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#define GCC_PCNOC_BUS_TIMEOUT0_BCR 54
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#define GCC_PCNOC_BUS_TIMEOUT1_BCR 55
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#define GCC_PCNOC_BUS_TIMEOUT2_BCR 56
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#define GCC_PCNOC_BUS_TIMEOUT3_BCR 57
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#define GCC_PCNOC_BUS_TIMEOUT4_BCR 58
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#define GCC_PCNOC_BUS_TIMEOUT5_BCR 59
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#define GCC_PCNOC_BUS_TIMEOUT6_BCR 60
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#define GCC_PCNOC_BUS_TIMEOUT7_BCR 61
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#define GCC_PCNOC_BUS_TIMEOUT8_BCR 62
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#define GCC_PCNOC_BUS_TIMEOUT9_BCR 63
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#define GCC_UNIPHY0_BCR 64
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#define GCC_UNIPHY1_BCR 65
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#define GCC_UNIPHY2_BCR 66
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#define GCC_CMN_12GPLL_BCR 67
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#define GCC_QPIC_BCR 68
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#define GCC_MDIO_BCR 69
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#define GCC_PCIE1_TBU_BCR 70
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#define GCC_WCSS_CORE_TBU_BCR 71
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#define GCC_WCSS_Q6_TBU_BCR 72
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#define GCC_USB0_TBU_BCR 73
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#define GCC_USB1_TBU_BCR 74
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#define GCC_PCIE0_TBU_BCR 75
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#define GCC_NSS_NOC_TBU_BCR 76
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#define GCC_PCIE0_BCR 77
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#define GCC_PCIE0_PHY_BCR 78
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#define GCC_PCIE0PHY_PHY_BCR 79
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#define GCC_PCIE0_LINK_DOWN_BCR 80
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#define GCC_PCIE1_BCR 81
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#define GCC_PCIE1_PHY_BCR 82
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#define GCC_PCIE1PHY_PHY_BCR 83
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#define GCC_PCIE1_LINK_DOWN_BCR 84
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#define GCC_DCC_BCR 85
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#define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR 86
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#define GCC_APC1_VOLTAGE_DROOP_DETECTOR_BCR 87
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#define GCC_SMMU_CATS_BCR 88
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#endif
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