forked from Minki/linux
851140ab0d
KernelCI reports that bcm2835_defconfig is no longer booting since commitac7c3e4ff4("compiler: enable CONFIG_OPTIMIZE_INLINING forcibly") (https://lkml.org/lkml/2019/9/26/825). I also received a regression report from Nicolas Saenz Julienne (https://lkml.org/lkml/2019/9/27/263). This problem has cropped up on bcm2835_defconfig because it enables CONFIG_CC_OPTIMIZE_FOR_SIZE. The compiler tends to prefer not inlining functions with -Os. I was able to reproduce it with other boards and defconfig files by manually enabling CONFIG_CC_OPTIMIZE_FOR_SIZE. The __get_user_check() specifically uses r0, r1, r2 registers. So, uaccess_save_and_enable() and uaccess_restore() must be inlined. Otherwise, those register assignments would be entirely dropped, according to my analysis of the disassembly. Prior to commit9012d01166("compiler: allow all arches to enable CONFIG_OPTIMIZE_INLINING"), the 'inline' marker was always enough for inlining functions, except on x86. Since that commit, all architectures can enable CONFIG_OPTIMIZE_INLINING. So, __always_inline is now the only guaranteed way of forcible inlining. I added __always_inline to 4 functions in the call-graph from the __get_user_check() macro. Fixes:9012d01166("compiler: allow all arches to enable CONFIG_OPTIMIZE_INLINING") Reported-by: "kernelci.org bot" <bot@kernelci.org> Reported-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
155 lines
3.7 KiB
C
155 lines
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* arch/arm/include/asm/domain.h
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*
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* Copyright (C) 1999 Russell King.
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*/
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#ifndef __ASM_PROC_DOMAIN_H
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#define __ASM_PROC_DOMAIN_H
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#ifndef __ASSEMBLY__
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#include <asm/barrier.h>
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#include <asm/thread_info.h>
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#endif
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/*
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* Domain numbers
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*
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* DOMAIN_IO - domain 2 includes all IO only
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* DOMAIN_USER - domain 1 includes all user memory only
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* DOMAIN_KERNEL - domain 0 includes all kernel memory only
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*
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* The domain numbering depends on whether we support 36 physical
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* address for I/O or not. Addresses above the 32 bit boundary can
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* only be mapped using supersections and supersections can only
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* be set for domain 0. We could just default to DOMAIN_IO as zero,
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* but there may be systems with supersection support and no 36-bit
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* addressing. In such cases, we want to map system memory with
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* supersections to reduce TLB misses and footprint.
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*
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* 36-bit addressing and supersections are only available on
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* CPUs based on ARMv6+ or the Intel XSC3 core.
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*/
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#ifndef CONFIG_IO_36
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#define DOMAIN_KERNEL 0
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#define DOMAIN_USER 1
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#define DOMAIN_IO 2
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#else
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#define DOMAIN_KERNEL 2
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#define DOMAIN_USER 1
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#define DOMAIN_IO 0
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#endif
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#define DOMAIN_VECTORS 3
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/*
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* Domain types
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*/
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#define DOMAIN_NOACCESS 0
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#define DOMAIN_CLIENT 1
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#ifdef CONFIG_CPU_USE_DOMAINS
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#define DOMAIN_MANAGER 3
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#else
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#define DOMAIN_MANAGER 1
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#endif
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#define domain_mask(dom) ((3) << (2 * (dom)))
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#define domain_val(dom,type) ((type) << (2 * (dom)))
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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#define DACR_INIT \
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(domain_val(DOMAIN_USER, DOMAIN_NOACCESS) | \
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domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
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domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
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domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT))
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#else
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#define DACR_INIT \
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(domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \
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domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
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domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
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domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT))
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#endif
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#define __DACR_DEFAULT \
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domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT) | \
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domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
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domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)
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#define DACR_UACCESS_DISABLE \
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(__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_NOACCESS))
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#define DACR_UACCESS_ENABLE \
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(__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_CLIENT))
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_CPU_CP15_MMU
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static __always_inline unsigned int get_domain(void)
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{
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unsigned int domain;
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asm(
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"mrc p15, 0, %0, c3, c0 @ get domain"
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: "=r" (domain)
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: "m" (current_thread_info()->cpu_domain));
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return domain;
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}
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static __always_inline void set_domain(unsigned int val)
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{
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asm volatile(
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"mcr p15, 0, %0, c3, c0 @ set domain"
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: : "r" (val) : "memory");
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isb();
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}
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#else
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static __always_inline unsigned int get_domain(void)
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{
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return 0;
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}
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static __always_inline void set_domain(unsigned int val)
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{
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}
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#endif
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#ifdef CONFIG_CPU_USE_DOMAINS
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#define modify_domain(dom,type) \
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do { \
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unsigned int domain = get_domain(); \
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domain &= ~domain_mask(dom); \
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domain = domain | domain_val(dom, type); \
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set_domain(domain); \
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} while (0)
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#else
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static inline void modify_domain(unsigned dom, unsigned type) { }
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#endif
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/*
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* Generate the T (user) versions of the LDR/STR and related
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* instructions (inline assembly)
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*/
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#ifdef CONFIG_CPU_USE_DOMAINS
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#define TUSER(instr) TUSERCOND(instr, )
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#define TUSERCOND(instr, cond) #instr "t" #cond
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#else
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#define TUSER(instr) TUSERCOND(instr, )
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#define TUSERCOND(instr, cond) #instr #cond
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#endif
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#else /* __ASSEMBLY__ */
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/*
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* Generate the T (user) versions of the LDR/STR and related
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* instructions
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*/
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#ifdef CONFIG_CPU_USE_DOMAINS
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#define TUSER(instr) instr ## t
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#else
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#define TUSER(instr) instr
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* !__ASM_PROC_DOMAIN_H */
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