Claudiu Beznea 9a0775c9cd ARM: at91: ddr: fix typo to align with datasheet naming ... Fix typo on UDDRC_PWRCTL.SELFREF_SW bitmask to align with datasheet naming. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220113144900.906370-4-claudiu.beznea@microchip.com		2022-02-25 12:36:25 +01:00
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arc	clocksource/drivers/arc_timer: Eliminate redefined macro error	2021-10-16 22:15:01 +02:00
at91	ARM: at91: ddr: fix typo to align with datasheet naming	2022-02-25 12:36:25 +01:00
bcm2835	firmware: raspberrypi: Introduce devm_rpi_firmware_get()	2021-03-22 17:59:51 +01:00
canaan	clk: Add RISC-V Canaan Kendryte K210 clock driver	2021-02-22 17:51:04 -08:00
fsl	soc: fsl: dpio: add Net DIM integration	2021-10-15 14:32:41 +01:00
imx	ARM: imx: Initialize SoC ID on i.MX50	2021-05-13 15:42:21 +08:00
mediatek	IOMMU Updates for Linux v5.12	2021-02-22 10:31:29 -08:00
microchip	mbox: add polarfire soc system controller mailbox	2021-06-26 12:06:48 -05:00
mscc	net: dsa: felix: add port fast age support	2022-01-07 18:58:25 -08:00
qcom	soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS	2021-09-21 17:41:48 -05:00
rockchip	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
sa1100	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
sifive	riscv: move sifive_l2_cache.h to include/soc	2020-01-12 10:12:44 -08:00
tegra	soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()	2021-12-16 14:03:38 +01:00