Linu Cherian e5b829de05 iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 ... Cavium ThunderX2 SMMU implementation doesn't support page 1 register space and PAGE0_REGS_ONLY option is enabled as an errata workaround. This option when turned on, replaces all page 1 offsets used for EVTQ_PROD/CONS, PRIQ_PROD/CONS register access with page 0 offsets. SMMU resource size checks are now based on SMMU option PAGE0_REGS_ONLY, since resource size can be either 64k/128k. For this, arm_smmu_device_dt_probe/acpi_probe has been moved before platform_get_resource call, so that SMMU options are set beforehand. Signed-off-by: Linu Cherian <linu.cherian@cavium.com> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com> Signed-off-by: Will Deacon <will.deacon@arm.com>		2017-06-23 17:58:03 +01:00
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bindings	iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74	2017-06-23 17:58:03 +01:00
00-INDEX
booting-without-of.txt	dt: add documentation of "hotpluggable" memory property	2016-12-12 18:55:07 -08:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
todo.txt
usage-model.txt