linux/arch/arm/include/asm/kexec.h
Russell King 0d70262a2d ARM: kexec: fix failure to boot crash kernel
When kexec was converted to DTB, the dtb address was passed between
machine_kexec_prepare() and machine_kexec() using a static variable.
This is bad news if you load a crash kernel followed by a normal
kernel or vice versa - the last loaded kernel overwrites the dtb
address.

This can result in kexec failures, as (eg) we try to boot the crash
kernel with the last loaded dtb.  For example, with:

the crash kernel fails to find the dtb.

Avoid this by defining a kimage architecture structure, and store
the address to be passed in r2 there, which will either be the ATAGs
or the dtb blob.

Fixes: 4cabd1d962 ("ARM: 7539/1: kexec: scan for dtb magic in segments")
Fixes: 42d720d173 ("ARM: kexec: Make .text R/W in machine_kexec")
Reported-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-07-20 11:37:42 +01:00

90 lines
2.3 KiB
C

#ifndef _ARM_KEXEC_H
#define _ARM_KEXEC_H
#ifdef CONFIG_KEXEC
/* Maximum physical address we can use pages from */
#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
/* Maximum address we can reach in physical address mode */
#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
/* Maximum address we can use for the control code buffer */
#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
#define KEXEC_CONTROL_PAGE_SIZE 4096
#define KEXEC_ARCH KEXEC_ARCH_ARM
#define KEXEC_ARM_ATAGS_OFFSET 0x1000
#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000
#ifndef __ASSEMBLY__
#define ARCH_HAS_KIMAGE_ARCH
struct kimage_arch {
u32 kernel_r2;
};
/**
* crash_setup_regs() - save registers for the panic kernel
* @newregs: registers are saved here
* @oldregs: registers to be saved (may be %NULL)
*
* Function copies machine registers from @oldregs to @newregs. If @oldregs is
* %NULL then current registers are stored there.
*/
static inline void crash_setup_regs(struct pt_regs *newregs,
struct pt_regs *oldregs)
{
if (oldregs) {
memcpy(newregs, oldregs, sizeof(*newregs));
} else {
__asm__ __volatile__ (
"stmia %[regs_base], {r0-r12}\n\t"
"mov %[_ARM_sp], sp\n\t"
"str lr, %[_ARM_lr]\n\t"
"adr %[_ARM_pc], 1f\n\t"
"mrs %[_ARM_cpsr], cpsr\n\t"
"1:"
: [_ARM_pc] "=r" (newregs->ARM_pc),
[_ARM_cpsr] "=r" (newregs->ARM_cpsr),
[_ARM_sp] "=r" (newregs->ARM_sp),
[_ARM_lr] "=o" (newregs->ARM_lr)
: [regs_base] "r" (&newregs->ARM_r0)
: "memory"
);
}
}
/* Function pointer to optional machine-specific reinitialization */
extern void (*kexec_reinit)(void);
static inline unsigned long phys_to_boot_phys(phys_addr_t phys)
{
return phys_to_idmap(phys);
}
#define phys_to_boot_phys phys_to_boot_phys
static inline phys_addr_t boot_phys_to_phys(unsigned long entry)
{
return idmap_to_phys(entry);
}
#define boot_phys_to_phys boot_phys_to_phys
static inline unsigned long page_to_boot_pfn(struct page *page)
{
return page_to_pfn(page) + (arch_phys_to_idmap_offset >> PAGE_SHIFT);
}
#define page_to_boot_pfn page_to_boot_pfn
static inline struct page *boot_pfn_to_page(unsigned long boot_pfn)
{
return pfn_to_page(boot_pfn - (arch_phys_to_idmap_offset >> PAGE_SHIFT));
}
#define boot_pfn_to_page boot_pfn_to_page
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_KEXEC */
#endif /* _ARM_KEXEC_H */