forked from Minki/linux
d8ea757b25
- add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
KSEG size, starting at physical address other than 0;
- make kernel load address configurable;
- clean up kernel memory layout macros;
- drop sysmem early allocator and switch to memblock;
- enable kmemleak and memory reservation from the device tree;
- wire up new syscalls: userfaultfd, membarrier, mlock2, copy_file_range,
preadv2 and pwritev2;
- add new platform: Cadence Configurable System Platform (CSP) and new
core variant for it: xt_lnx;
- rearrange CCOUNT calibration code, make most of it generic;
- improve machine reset code (XTFPGA now reboots reliably with MMUv3
cores);
- provide default memmap command line option for configurations without
device tree support;
- ISS fixes: simdisk is now capable of using highmem pages, panic
correctly terminates simulator.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJX9RvtAAoJEFH5zJH4P6BEwmoQAJTUTrkRVd0nlTkh2vt8GfNR
s0rGUnAZa2dm3EY+J7F7RFxDfcXHP5Z73iM0fm8mUt8V/f6NR4QEF1FB9BI0lqXy
fTKHCgt+85BtPzIsNukwDi+QRyEtn3wFVCluKU4mtZ6KcEffTJwT0zMxrpDXoMdq
gcoFGViSdQ0aNo1RosHUBCF/f34+cfUnvvmF8FhcnkAmTWniM+kWk0nDmGz+qInF
ZWhvbcrPEEqR0j/wLLgL7kMhz1AYLI08+DaGR2UP80NQ9yuWraDfsRFnKbAHDqE0
JHAdcUQtPrQmBPSlc+CaE84sPXutsKVoZ/DKby70OR1TljrdytxnVC7zBvdgfVGd
bWa7+qNdhSjGKtxwOPIvjOK5VJZYsFAI3SDEVW9pg0ZD3uBec+P1yWbh1Wvo+Geb
X46EdlUfjsVp4U4G8CTG3aTQB8Dgn6QnkhtbI067l6evCebT21bx4Re1nPCfLD8C
nlt1bgstVUuWDJt+2J0cGbMBill+RBtCEHEwsU778dqq7dJmiawg1aLI2kyHL6P5
VpBaprVrUHHZ5We0obl1BPyK1Sfc7L/NiaKv0wZbuAIoEjeEloYEB+q56HFz9NWn
CJfcfugIh9q58842C0L0XY6uhce+7ZIpqTCMYFC6e8QjpJibY9qbORyineQy4Q7V
QtGm6s1HFRCyvzpx2Uen
=8HqU
-----END PGP SIGNATURE-----
Merge tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa
Pull Xtensa updates from Max Filippov:
"Updates for the xtensa architecture. It is a combined set of patches
for 4.8 that never got to the mainline and new patches for 4.9.
- add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
KSEG size, starting at physical address other than 0
- make kernel load address configurable
- clean up kernel memory layout macros
- drop sysmem early allocator and switch to memblock
- enable kmemleak and memory reservation from the device tree
- wire up new syscalls: userfaultfd, membarrier, mlock2,
copy_file_range, preadv2 and pwritev2
- add new platform: Cadence Configurable System Platform (CSP) and
new core variant for it: xt_lnx
- rearrange CCOUNT calibration code, make most of it generic
- improve machine reset code (XTFPGA now reboots reliably with MMUv3
cores)
- provide default memmap command line option for configurations
without device tree support
- ISS fixes: simdisk is now capable of using highmem pages, panic
correctly terminates simulator"
* tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa: (24 commits)
xtensa: disable MMU initialization option on MMUv2 cores
xtensa: add default memmap and mmio32native options to defconfigs
xtensa: add default memmap option to common_defconfig
xtensa: add default memmap option to iss_defconfig
xtensa: ISS: allow simdisk to use high memory buffers
xtensa: ISS: define simc_exit and use it instead of inline asm
xtensa: xtfpga: group platform_* functions together
xtensa: rearrange CCOUNT calibration
xtensa: xtfpga: use clock provider, don't update DT
xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.
xtensa: initialize MMU before jumping to reset vector
xtensa: fix icountlevel setting in cpu_reset
xtensa: extract common CPU reset code into separate function
xtensa: Added Cadence CSP kernel configuration for Xtensa
xtensa: fix default kernel load address
xtensa: wire up new syscalls
xtensa: support reserved-memory DT node
xtensa: drop sysmem and switch to memblock
xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE}
xtensa: cleanup MMU setup and kernel layout macros
...
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