forked from Minki/linux
9f74d77018
This patch is to add four options to synthesize events which are described as below: 'f': synthesize first level cache events 'm': synthesize last level cache events 't': synthesize TLB events 'a': synthesize remote access events This four options will be used by ARM SPE as their first consumer. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Tested-by: James Clark <james.clark@arm.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Al Grant <al.grant@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: http://lore.kernel.org/lkml/20200530122442.490-3-leo.yan@linaro.org Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
50 lines
1.8 KiB
Plaintext
50 lines
1.8 KiB
Plaintext
i synthesize instructions events
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b synthesize branches events (branch misses for Arm SPE)
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c synthesize branches events (calls only)
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r synthesize branches events (returns only)
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x synthesize transactions events
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w synthesize ptwrite events
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p synthesize power events
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o synthesize other events recorded due to the use
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of aux-output (refer to perf record)
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e synthesize error events
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d create a debug log
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f synthesize first level cache events
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m synthesize last level cache events
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t synthesize TLB events
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a synthesize remote access events
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g synthesize a call chain (use with i or x)
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G synthesize a call chain on existing event records
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l synthesize last branch entries (use with i or x)
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L synthesize last branch entries on existing event records
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s skip initial number of events
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The default is all events i.e. the same as --itrace=ibxwpe,
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except for perf script where it is --itrace=ce
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In addition, the period (default 100000, except for perf script where it is 1)
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for instructions events can be specified in units of:
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i instructions
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t ticks
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ms milliseconds
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us microseconds
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ns nanoseconds (default)
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Also the call chain size (default 16, max. 1024) for instructions or
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transactions events can be specified.
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Also the number of last branch entries (default 64, max. 1024) for
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instructions or transactions events can be specified.
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Similar to options g and l, size may also be specified for options G and L.
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On x86, note that G and L work poorly when data has been recorded with
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large PEBS. Refer linkperf:perf-intel-pt[1] man page for details.
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It is also possible to skip events generated (instructions, branches, transactions,
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ptwrite, power) at the beginning. This is useful to ignore initialization code.
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--itrace=i0nss1000000
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skips the first million instructions.
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